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authorAdam Ford <aford173@gmail.com>2023-05-25 22:05:55 -0500
committerNeil Armstrong <neil.armstrong@linaro.org>2023-05-26 09:20:41 +0200
commit33d8d14c83bf67aa0d262961a6fda9c40f3c1052 (patch)
tree74a142dace1f420a833b19290ce416c1535df78a /drivers/gpu/drm/bridge/samsung-dsim.c
parent54f1a83c72250b182fa7722b0c5f6eb5e769598d (diff)
downloadlwn-33d8d14c83bf67aa0d262961a6fda9c40f3c1052.tar.gz
lwn-33d8d14c83bf67aa0d262961a6fda9c40f3c1052.zip
drm: bridge: samsung-dsim: Fetch pll-clock-frequency automatically
Make the pll-clock-frequency optional. If it's present, use it to maintain backwards compatibility with existing hardware. If it is absent, read clock rate of "sclk_mipi" to determine the rate. Since it can be optional, change the message from an error to dev_info. Signed-off-by: Adam Ford <aford173@gmail.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # imx8mm-icore Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230526030559.326566-4-aford173@gmail.com
Diffstat (limited to 'drivers/gpu/drm/bridge/samsung-dsim.c')
-rw-r--r--drivers/gpu/drm/bridge/samsung-dsim.c22
1 files changed, 15 insertions, 7 deletions
diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c
index d0f97fd199d0..cb6a7cf68352 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -1740,11 +1740,11 @@ static const struct mipi_dsi_host_ops samsung_dsim_ops = {
};
static int samsung_dsim_of_read_u32(const struct device_node *np,
- const char *propname, u32 *out_value)
+ const char *propname, u32 *out_value, bool optional)
{
int ret = of_property_read_u32(np, propname, out_value);
- if (ret < 0)
+ if (ret < 0 && !optional)
pr_err("%pOF: failed to get '%s' property\n", np, propname);
return ret;
@@ -1757,19 +1757,27 @@ static int samsung_dsim_parse_dt(struct samsung_dsim *dsi)
u32 lane_polarities[5] = { 0 };
struct device_node *endpoint;
int i, nr_lanes, ret;
+ struct clk *pll_clk;
ret = samsung_dsim_of_read_u32(node, "samsung,pll-clock-frequency",
- &dsi->pll_clk_rate);
- if (ret < 0)
- return ret;
+ &dsi->pll_clk_rate, 1);
+ /* If it doesn't exist, read it from the clock instead of failing */
+ if (ret < 0) {
+ dev_dbg(dev, "Using sclk_mipi for pll clock frequency\n");
+ pll_clk = devm_clk_get(dev, "sclk_mipi");
+ if (!IS_ERR(pll_clk))
+ dsi->pll_clk_rate = clk_get_rate(pll_clk);
+ else
+ return PTR_ERR(pll_clk);
+ }
ret = samsung_dsim_of_read_u32(node, "samsung,burst-clock-frequency",
- &dsi->burst_clk_rate);
+ &dsi->burst_clk_rate, 0);
if (ret < 0)
return ret;
ret = samsung_dsim_of_read_u32(node, "samsung,esc-clock-frequency",
- &dsi->esc_clk_rate);
+ &dsi->esc_clk_rate, 0);
if (ret < 0)
return ret;