diff options
| author | Evan Quan <evan.quan@amd.com> | 2019-07-17 16:32:27 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-07-18 14:18:07 -0500 |
| commit | 3a48c10d7fb055ff655096eb50e96f36b22b8021 (patch) | |
| tree | eb2fbb94d7f31189ba7b371cfe4f594a191963eb /drivers/gpu/drm/amd | |
| parent | fbdc5d8d84cc521573f1265d5e6ceb04a16075c9 (diff) | |
| download | lwn-3a48c10d7fb055ff655096eb50e96f36b22b8021.tar.gz lwn-3a48c10d7fb055ff655096eb50e96f36b22b8021.zip | |
drm/amd/powerplay: report bootup clock as max supported on dpm disabled
With gfxclk or uclk dpm disabled, it's reasonable to report bootup clock
as the max supported.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 27 |
1 files changed, 26 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c index ec1904e47927..b6b6c10eeb6e 100644 --- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c @@ -137,12 +137,37 @@ int smu_get_dpm_freq_range(struct smu_context *smu, enum smu_clk_type clk_type, { int ret = 0, clk_id = 0; uint32_t param = 0; + uint32_t clock_limit; if (!min && !max) return -EINVAL; - if (!smu_clk_dpm_is_enabled(smu, clk_type)) + if (!smu_clk_dpm_is_enabled(smu, clk_type)) { + switch (clk_type) { + case SMU_MCLK: + case SMU_UCLK: + clock_limit = smu->smu_table.boot_values.uclk; + break; + case SMU_GFXCLK: + case SMU_SCLK: + clock_limit = smu->smu_table.boot_values.gfxclk; + break; + case SMU_SOCCLK: + clock_limit = smu->smu_table.boot_values.socclk; + break; + default: + clock_limit = 0; + break; + } + + /* clock in Mhz unit */ + if (min) + *min = clock_limit / 100; + if (max) + *max = clock_limit / 100; + return 0; + } mutex_lock(&smu->mutex); clk_id = smu_clk_get_index(smu, clk_type); |