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authorDavid Galiffi <david.galiffi@amd.com>2019-06-07 21:32:34 -0400
committerAlex Deucher <alexander.deucher@amd.com>2019-07-18 14:18:09 -0500
commit0430017149c53f20493ebeee856315c669d18f4d (patch)
tree1987450d0ad8c84adcc1b3f3f62d06949bb79ddd /drivers/gpu/drm/amd
parent0b6cbbd5da8f3ab99442bdc0df6b6bb619f87d5a (diff)
downloadlwn-0430017149c53f20493ebeee856315c669d18f4d.tar.gz
lwn-0430017149c53f20493ebeee856315c669d18f4d.zip
drm/amd/display: Incorrect Read Interval Time For CR Sequence
[WHY] TRAINING_AUX_RD_INTERVAL (DPCD 000Eh) modifies the read interval for the EQ training sequence. CR read interval should remain 100 us. Currently, the CR interval is also being modified. [HOW] lt_settings->cr_pattern_time should always be 100 us. Signed-off-by: David Galiffi <david.galiffi@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd')
-rw-r--r--drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index fca1bfc901b6..4442e7b1e5b5 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -1035,7 +1035,7 @@ static void initialize_training_settings(
if (link->preferred_training_settings.cr_pattern_time != NULL)
lt_settings->cr_pattern_time = *link->preferred_training_settings.cr_pattern_time;
else
- lt_settings->cr_pattern_time = get_training_aux_rd_interval(link, 100);
+ lt_settings->cr_pattern_time = 100;
if (link->preferred_training_settings.eq_pattern_time != NULL)
lt_settings->eq_pattern_time = *link->preferred_training_settings.eq_pattern_time;