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| author | Harry Wentland <harry.wentland@amd.com> | 2026-04-24 11:38:00 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2026-06-03 13:44:21 -0400 |
| commit | 08d4acb07f6c51ab09ade4a6685260eaf21f1cdc (patch) | |
| tree | faf3ffac5bb2e02ebba7af76612c6ab9a6f792c7 /drivers/gpu/drm/amd/display/include | |
| parent | 8cd9c5b1ccc809eff79029b46a722fba3fa41d75 (diff) | |
| download | lwn-08d4acb07f6c51ab09ade4a6685260eaf21f1cdc.tar.gz lwn-08d4acb07f6c51ab09ade4a6685260eaf21f1cdc.zip | |
drm/amd/display: Add HDMI FRL definitions to includes
This patch adds all relevant includes in DC that are
used by the HDMI FRL implementation in DC.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/include')
4 files changed, 26 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/display/include/audio_types.h b/drivers/gpu/drm/amd/display/include/audio_types.h index 6699ad4fa825..2a0f1a9c30a5 100644 --- a/drivers/gpu/drm/amd/display/include/audio_types.h +++ b/drivers/gpu/drm/amd/display/include/audio_types.h @@ -56,6 +56,7 @@ struct audio_crtc_info { uint16_t refresh_rate; uint8_t pixel_repetition; bool interlaced; + uint32_t frl_character_clock_kHz; /* in KHz */ }; struct azalia_clock_info { uint32_t pixel_clock_in_10khz; diff --git a/drivers/gpu/drm/amd/display/include/bios_parser_types.h b/drivers/gpu/drm/amd/display/include/bios_parser_types.h index 13da300fd4b7..113af171e8f5 100644 --- a/drivers/gpu/drm/amd/display/include/bios_parser_types.h +++ b/drivers/gpu/drm/amd/display/include/bios_parser_types.h @@ -330,7 +330,11 @@ struct bp_encoder_cap_info { uint32_t DP_UHBR13_5_EN:1; uint32_t DP_UHBR20_EN:1; uint32_t DP_IS_USB_C:1; - uint32_t RESERVED:27; + uint32_t IS_HDMI_FRL_CAPABLE:1; + uint32_t FRL_8G_EN:1; + uint32_t FRL_10G_EN:1; + uint32_t FRL_12G_EN:1; + uint32_t RESERVED:19; }; struct bp_soc_bb_info { @@ -347,7 +351,13 @@ struct bp_connector_speed_cap_info { uint32_t DP_UHBR13_5_EN:1; uint32_t DP_UHBR20_EN:1; uint32_t DP_IS_USB_C:1; - uint32_t RESERVED:28; + uint32_t FRL_8G_EN:1; + uint32_t FRL_10G_EN:1; + uint32_t FRL_12G_EN:1; + uint32_t FRL_16G_EN:1; + uint32_t FRL_20G_EN:1; + uint32_t FRL_24G_EN:1; + uint32_t RESERVED:19; }; #endif /*__DAL_BIOS_PARSER_TYPES_H__ */ diff --git a/drivers/gpu/drm/amd/display/include/logger_types.h b/drivers/gpu/drm/amd/display/include/logger_types.h index 177acb0574f1..a11bfb2e7cdd 100644 --- a/drivers/gpu/drm/amd/display/include/logger_types.h +++ b/drivers/gpu/drm/amd/display/include/logger_types.h @@ -62,6 +62,8 @@ #define DC_LOG_ALL_TF_CHANNELS(...) pr_debug("[GAMMA]:"__VA_ARGS__) #define DC_LOG_DSC(...) drm_dbg_dp((DC_LOGGER)->dev, __VA_ARGS__) #define DC_LOG_SMU(...) pr_debug("[SMU_MSG]:"__VA_ARGS__) +#define DC_LOG_HDMI_FRL(...) drm_dbg((DC_LOGGER)->dev, __VA_ARGS__) +#define DC_LOG_HDMI_FRL_LTP(...) drm_dbg((DC_LOGGER)->dev, __VA_ARGS__) #define DC_LOG_DWB(...) drm_dbg((DC_LOGGER)->dev, __VA_ARGS__) #define DC_LOG_DP2(...) drm_dbg_dp((DC_LOGGER)->dev, __VA_ARGS__) #define DC_LOG_AUTO_DPM_TEST(...) pr_debug("[AutoDPMTest]: "__VA_ARGS__) diff --git a/drivers/gpu/drm/amd/display/include/signal_types.h b/drivers/gpu/drm/amd/display/include/signal_types.h index 3a2c2d2fb629..9b134aa3e275 100644 --- a/drivers/gpu/drm/amd/display/include/signal_types.h +++ b/drivers/gpu/drm/amd/display/include/signal_types.h @@ -30,6 +30,8 @@ #define TMDS_MIN_PIXEL_CLOCK 25000 /* Maximum pixel clock, in KHz. For TMDS signal is 165.00 MHz */ #define TMDS_MAX_PIXEL_CLOCK 165000 +/* Maximum pixel clock, in KHz. For HDMI2 TMDS signal is 600 MHz */ +#define HDMI2_TMDS_MAX_PIXEL_CLOCK 600000 enum signal_type { SIGNAL_TYPE_NONE = 0L, /* no signal */ @@ -41,6 +43,7 @@ enum signal_type { SIGNAL_TYPE_DISPLAY_PORT = (1 << 5), SIGNAL_TYPE_DISPLAY_PORT_MST = (1 << 6), SIGNAL_TYPE_EDP = (1 << 7), + SIGNAL_TYPE_HDMI_FRL = (1 << 8), SIGNAL_TYPE_VIRTUAL = (1 << 9), /* Virtual Display */ }; @@ -65,6 +68,8 @@ static inline const char *signal_type_to_string(const int type) return "Display Port: MST"; case SIGNAL_TYPE_EDP: return "Embedded Display Port"; + case SIGNAL_TYPE_HDMI_FRL: + return "HDMI: FRL"; case SIGNAL_TYPE_VIRTUAL: return "Virtual"; default: @@ -78,9 +83,14 @@ static inline bool dc_is_hdmi_tmds_signal(enum signal_type signal) return (signal == SIGNAL_TYPE_HDMI_TYPE_A); } +static inline bool dc_is_hdmi_frl_signal(enum signal_type signal) +{ + return ((signal == SIGNAL_TYPE_HDMI_FRL)); +} + static inline bool dc_is_hdmi_signal(enum signal_type signal) { - return (signal == SIGNAL_TYPE_HDMI_TYPE_A); + return (dc_is_hdmi_tmds_signal(signal) || dc_is_hdmi_frl_signal(signal)); } static inline bool dc_is_dp_sst_signal(enum signal_type signal) |