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authorDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>2021-03-11 09:19:34 -0500
committerAlex Deucher <alexander.deucher@amd.com>2021-04-09 16:40:18 -0400
commit234cc26f7dd15761dcd2ef818b9acaf4fe9cf92e (patch)
tree9f9247e3fc9deb83767b3a956cb8e603c0f38493 /drivers/gpu/drm/amd/display/dc/dcn301
parent1c85f3db778ffbeba91d71e9d6c8aa299f9b4efd (diff)
downloadlwn-234cc26f7dd15761dcd2ef818b9acaf4fe9cf92e.tar.gz
lwn-234cc26f7dd15761dcd2ef818b9acaf4fe9cf92e.zip
drm/amd/display: revert max lb lines change
Some hardware revisions do have a max number of lines limitation not honouring which can cause pstate switch underflow. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com> Acked-by: Solomon Chiu <solomon.chiu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn301')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
index 622a5bf9737f..1aefed63ed26 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
@@ -116,7 +116,7 @@ struct _vcs_dpi_ip_params_st dcn3_01_ip = {
.dcc_supported = true,
.writeback_interface_buffer_size_kbytes = 90,
.writeback_line_buffer_buffer_size = 656640,
- .max_line_buffer_lines = 32,
+ .max_line_buffer_lines = 12,
.writeback_luma_buffer_size_kbytes = 12, // writeback_line_buffer_buffer_size = 656640
.writeback_chroma_buffer_size_kbytes = 8,
.writeback_chroma_line_buffer_width_pixels = 4,