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author | xinhui pan <xinhui.pan@amd.com> | 2020-03-26 08:38:29 +0800 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2020-04-01 14:44:44 -0400 |
commit | c8e42d57859d5055bfe3313cfd5dc025097b753e (patch) | |
tree | d997d6be0d43843ad8f29614bf3df7c3c072f0bf /drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | |
parent | ac60b2294c9ea4a9c5f0c6c021c9a779243a8995 (diff) | |
download | lwn-c8e42d57859d5055bfe3313cfd5dc025097b753e.tar.gz lwn-c8e42d57859d5055bfe3313cfd5dc025097b753e.zip |
drm/amdgpu: implement more ib pools (v2)
We have three ib pools, they are normal, VM, direct pools.
Any jobs which schedule IBs without dependence on gpu scheduler should
use DIRECT pool.
Any jobs schedule direct VM update IBs should use VM pool.
Any other jobs use NORMAL pool.
v2: squash in coding style fix
Signed-off-by: xinhui pan <xinhui.pan@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c index f6e3f59efa2f..22d6e2c60b54 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c @@ -557,7 +557,8 @@ static int gfx_v10_0_ring_test_ib(struct amdgpu_ring *ring, long timeout) gpu_addr = adev->wb.gpu_addr + (index * 4); adev->wb.wb[index] = cpu_to_le32(0xCAFEDEAD); memset(&ib, 0, sizeof(ib)); - r = amdgpu_ib_get(adev, NULL, 16, &ib); + r = amdgpu_ib_get(adev, NULL, 16, + AMDGPU_IB_POOL_DIRECT, &ib); if (r) goto err1; |