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authorDave Airlie <airlied@redhat.com>2018-02-28 11:44:29 +1000
committerDave Airlie <airlied@redhat.com>2018-02-28 11:44:29 +1000
commit8bb5b22255dac09cd74eae9f86333b474d69fbbe (patch)
tree4cb47d92abb336be63d16636f5ab15723077c993 /drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
parent727edc744098e2a3d2f9f9ce53edb49cb7817ea1 (diff)
parent9aff8b2ae71dcf7f02443821a894a736f40e4919 (diff)
downloadlwn-8bb5b22255dac09cd74eae9f86333b474d69fbbe.tar.gz
lwn-8bb5b22255dac09cd74eae9f86333b474d69fbbe.zip
Merge branch 'drm-next-4.17' of git://people.freedesktop.org/~agd5f/linux into drm-next
- Expose thermal thresholds through hwmon properly - Rework HDP flushing for rings and CPU - Improved dual-link DVI handling in DC - Lots of code clean up - Additional DC clean up - Allow scanout from system memory on CZ/BR/ST - Improved PASID/VM integration - Expose GPU voltage and power via hwmon - Initial wattman-like support - Initial power profiles for use-case optimized performance - Rework GPUVM TLB flushing - Rework IP offset handling for SOC15 asics - Add CRC support in DC - Fixes for mmhub powergating - Initial regamma/degamma/CTM support in DC - ttm cleanups and simplifications - ttm OOM avoidance fixes * 'drm-next-4.17' of git://people.freedesktop.org/~agd5f/linux: (348 commits) Revert "drm/radeon/pm: autoswitch power state when in balanced mode" drm/radeon: use drm_gem_private_object_init drm/amdgpu: use drm_gem_private_object_init drm/amdgpu: mitigate workaround for i915 drm/amdgpu: implement amdgpu_gem_map_(attach/detach) drm/amdgpu/powerplay/smu7: drop refresh rate checks for mclk switching drm/amdgpu/cgs: add refresh rate checking to non-DC display code drm/amd/powerplay/smu7: allow mclk switching with no displays drm/amd/powerplay/vega10: allow mclk switching with no displays drm/amd/powerplay: use PP_CAP macro for disable_mclk_switching_for_frame_lock drm/amd/powerplay: remove unused headers drm/amdgpu_gem: fix error handling path in amdgpu_gem_va_update_vm drm/amdgpu: update the PASID mapping only on demand drm/amdgpu: separate PASID mapping from VM flush v2 drm/amd/display: Fix increment when sampling OTF in DCE drm/amd/display: De PQ implementation drm/amd/display: Remove unused dm_pp_ interfaces drm/amd/display: Add logging for aux DPCD access drm/amd/display: Set vsc pack revision when DPCD revision is >= 1.2 drm/amd/display: provide an interface to query firmware version ...
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h38
1 files changed, 30 insertions, 8 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
index cace7a93fc94..532263ab6e16 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
@@ -86,7 +86,7 @@ TRACE_EVENT(amdgpu_iv,
__field(unsigned, vmid_src)
__field(uint64_t, timestamp)
__field(unsigned, timestamp_src)
- __field(unsigned, pas_id)
+ __field(unsigned, pasid)
__array(unsigned, src_data, 4)
),
TP_fast_assign(
@@ -97,16 +97,16 @@ TRACE_EVENT(amdgpu_iv,
__entry->vmid_src = iv->vmid_src;
__entry->timestamp = iv->timestamp;
__entry->timestamp_src = iv->timestamp_src;
- __entry->pas_id = iv->pas_id;
+ __entry->pasid = iv->pasid;
__entry->src_data[0] = iv->src_data[0];
__entry->src_data[1] = iv->src_data[1];
__entry->src_data[2] = iv->src_data[2];
__entry->src_data[3] = iv->src_data[3];
),
- TP_printk("client_id:%u src_id:%u ring:%u vmid:%u timestamp: %llu pas_id:%u src_data: %08x %08x %08x %08x\n",
+ TP_printk("client_id:%u src_id:%u ring:%u vmid:%u timestamp: %llu pasid:%u src_data: %08x %08x %08x %08x\n",
__entry->client_id, __entry->src_id,
__entry->ring_id, __entry->vmid,
- __entry->timestamp, __entry->pas_id,
+ __entry->timestamp, __entry->pasid,
__entry->src_data[0], __entry->src_data[1],
__entry->src_data[2], __entry->src_data[3])
);
@@ -217,7 +217,7 @@ TRACE_EVENT(amdgpu_vm_grab_id,
struct amdgpu_job *job),
TP_ARGS(vm, ring, job),
TP_STRUCT__entry(
- __field(struct amdgpu_vm *, vm)
+ __field(u32, pasid)
__field(u32, ring)
__field(u32, vmid)
__field(u32, vm_hub)
@@ -226,15 +226,15 @@ TRACE_EVENT(amdgpu_vm_grab_id,
),
TP_fast_assign(
- __entry->vm = vm;
+ __entry->pasid = vm->pasid;
__entry->ring = ring->idx;
__entry->vmid = job->vmid;
__entry->vm_hub = ring->funcs->vmhub,
__entry->pd_addr = job->vm_pd_addr;
__entry->needs_flush = job->vm_needs_flush;
),
- TP_printk("vm=%p, ring=%u, id=%u, hub=%u, pd_addr=%010Lx needs_flush=%u",
- __entry->vm, __entry->ring, __entry->vmid,
+ TP_printk("pasid=%d, ring=%u, id=%u, hub=%u, pd_addr=%010Lx needs_flush=%u",
+ __entry->pasid, __entry->ring, __entry->vmid,
__entry->vm_hub, __entry->pd_addr, __entry->needs_flush)
);
@@ -378,6 +378,28 @@ TRACE_EVENT(amdgpu_vm_flush,
__entry->vm_hub,__entry->pd_addr)
);
+DECLARE_EVENT_CLASS(amdgpu_pasid,
+ TP_PROTO(unsigned pasid),
+ TP_ARGS(pasid),
+ TP_STRUCT__entry(
+ __field(unsigned, pasid)
+ ),
+ TP_fast_assign(
+ __entry->pasid = pasid;
+ ),
+ TP_printk("pasid=%u", __entry->pasid)
+);
+
+DEFINE_EVENT(amdgpu_pasid, amdgpu_pasid_allocated,
+ TP_PROTO(unsigned pasid),
+ TP_ARGS(pasid)
+);
+
+DEFINE_EVENT(amdgpu_pasid, amdgpu_pasid_freed,
+ TP_PROTO(unsigned pasid),
+ TP_ARGS(pasid)
+);
+
TRACE_EVENT(amdgpu_bo_list_set,
TP_PROTO(struct amdgpu_bo_list *list, struct amdgpu_bo *bo),
TP_ARGS(list, bo),