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authorPeng Ju Zhou <PengJu.Zhou@amd.com>2021-04-23 13:42:01 +0800
committerAlex Deucher <alexander.deucher@amd.com>2021-05-21 10:32:08 -0400
commit6ba3f59eb4d928b6336112a2c70b4c51600b0f0a (patch)
tree6c01a785ec31cf7326c53afbeae27f38a6b266dc /drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
parentf2958a8b87745d707cc7cebf10ac09aa450bf8b7 (diff)
downloadlwn-6ba3f59eb4d928b6336112a2c70b4c51600b0f0a.tar.gz
lwn-6ba3f59eb4d928b6336112a2c70b4c51600b0f0a.zip
drm/amdgpu: Modify GC register access from MMIO to RLCG in file amdgpu_gmc.c
In SRIOV environment, KMD should access GC registers with RLCG if GC indirect access flag enabled. Signed-off-by: Peng Ju Zhou <PengJu.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index a129ecc73869..3313d43bb94a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
@@ -629,13 +629,18 @@ void amdgpu_gmc_set_vm_fault_masks(struct amdgpu_device *adev, int hub_type,
for (i = 0; i < 16; i++) {
reg = hub->vm_context0_cntl + hub->ctx_distance * i;
- tmp = RREG32(reg);
+ tmp = (hub_type == AMDGPU_GFXHUB_0) ?
+ RREG32_SOC15_IP(GC, reg) :
+ RREG32_SOC15_IP(MMHUB, reg);
+
if (enable)
tmp |= hub->vm_cntx_cntl_vm_fault;
else
tmp &= ~hub->vm_cntx_cntl_vm_fault;
- WREG32(reg, tmp);
+ (hub_type == AMDGPU_GFXHUB_0) ?
+ WREG32_SOC15_IP(GC, reg, tmp) :
+ WREG32_SOC15_IP(MMHUB, reg, tmp);
}
}