diff options
| author | xinhui pan <xinhui.pan@amd.com> | 2020-03-26 08:38:29 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-04-01 14:44:44 -0400 |
| commit | c8e42d57859d5055bfe3313cfd5dc025097b753e (patch) | |
| tree | d997d6be0d43843ad8f29614bf3df7c3c072f0bf /drivers/gpu/drm/amd/amdgpu/amdgpu.h | |
| parent | ac60b2294c9ea4a9c5f0c6c021c9a779243a8995 (diff) | |
| download | lwn-c8e42d57859d5055bfe3313cfd5dc025097b753e.tar.gz lwn-c8e42d57859d5055bfe3313cfd5dc025097b753e.zip | |
drm/amdgpu: implement more ib pools (v2)
We have three ib pools, they are normal, VM, direct pools.
Any jobs which schedule IBs without dependence on gpu scheduler should
use DIRECT pool.
Any jobs schedule direct VM update IBs should use VM pool.
Any other jobs use NORMAL pool.
v2: squash in coding style fix
Signed-off-by: xinhui pan <xinhui.pan@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu.h')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu.h | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index b0597a84e137..7b3058fb5662 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -388,6 +388,13 @@ struct amdgpu_sa_bo { int amdgpu_fence_slab_init(void); void amdgpu_fence_slab_fini(void); +enum amdgpu_ib_pool_type { + AMDGPU_IB_POOL_NORMAL = 0, + AMDGPU_IB_POOL_VM, + AMDGPU_IB_POOL_DIRECT, + + AMDGPU_IB_POOL_MAX +}; /* * IRQS. */ @@ -439,7 +446,9 @@ struct amdgpu_fpriv { int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv); int amdgpu_ib_get(struct amdgpu_device *adev, struct amdgpu_vm *vm, - unsigned size, struct amdgpu_ib *ib); + unsigned size, + enum amdgpu_ib_pool_type pool, + struct amdgpu_ib *ib); void amdgpu_ib_free(struct amdgpu_device *adev, struct amdgpu_ib *ib, struct dma_fence *f); int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, @@ -843,7 +852,7 @@ struct amdgpu_device { unsigned num_rings; struct amdgpu_ring *rings[AMDGPU_MAX_RINGS]; bool ib_pool_ready; - struct amdgpu_sa_manager ring_tmp_bo; + struct amdgpu_sa_manager ring_tmp_bo[AMDGPU_IB_POOL_MAX]; /* interrupts */ struct amdgpu_irq irq; |