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authorSudeep Holla <sudeep.holla@arm.com>2022-04-28 13:29:13 +0100
committerSudeep Holla <sudeep.holla@arm.com>2022-04-28 18:22:52 +0100
commit7ad6b6ccbafc1faa04ca9d26635bdd5e3e240a69 (patch)
tree7679b54b5f5252d8e9f61f69223df2c9341620a4 /drivers/firmware/arm_scmi/clock.c
parentb260fccaebdc2c838e62aaef24fedf497f181d10 (diff)
downloadlwn-7ad6b6ccbafc1faa04ca9d26635bdd5e3e240a69.tar.gz
lwn-7ad6b6ccbafc1faa04ca9d26635bdd5e3e240a69.zip
firmware: arm_scmi: Set clock latency to U32_MAX if it is not supported
As per the spec, the clock_enable_delay is the worst case latency incurred by the platform to enable the clock. The value of 0 indicates that the platform doesn't support the same and must be considered as maximum latency for practical purposes. Currently the value of 0 is assigned as is and is propogated to the clock framework which can assume that the clock can support atomic enable operation. Link: https://lore.kernel.org/r/20220428122913.1654821-1-sudeep.holla@arm.com Fixes: 18f295b758b2 ("firmware: arm_scmi: Add support for clock_enable_latency") Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Diffstat (limited to 'drivers/firmware/arm_scmi/clock.c')
-rw-r--r--drivers/firmware/arm_scmi/clock.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/firmware/arm_scmi/clock.c b/drivers/firmware/arm_scmi/clock.c
index 7a031afff389..81f739700893 100644
--- a/drivers/firmware/arm_scmi/clock.c
+++ b/drivers/firmware/arm_scmi/clock.c
@@ -6,6 +6,7 @@
*/
#include <linux/module.h>
+#include <linux/limits.h>
#include <linux/sort.h>
#include "protocols.h"
@@ -128,12 +129,13 @@ static int scmi_clock_attributes_get(const struct scmi_protocol_handle *ph,
ret = ph->xops->do_xfer(ph, t);
if (!ret) {
+ u32 latency = 0;
attributes = le32_to_cpu(attr->attributes);
strlcpy(clk->name, attr->name, SCMI_MAX_STR_SIZE);
/* Is optional field clock_enable_latency provided ? */
if (t->rx.len == sizeof(*attr))
- clk->enable_latency =
- le32_to_cpu(attr->clock_enable_latency);
+ latency = le32_to_cpu(attr->clock_enable_latency);
+ clk->enable_latency = latency ? : U32_MAX;
}
ph->xops->xfer_put(ph, t);