diff options
| author | Qiuxu Zhuo <qiuxu.zhuo@intel.com> | 2021-06-11 10:01:18 -0700 |
|---|---|---|
| committer | Tony Luck <tony.luck@intel.com> | 2021-06-17 18:19:22 -0700 |
| commit | 2f4348e5a86198704368a699a7c4cdeb21d569f5 (patch) | |
| tree | 94ed09adb28ded9eebea24fdfaec6429afedc9b3 /drivers/edac/skx_common.h | |
| parent | e8049c4aa5d83e2a853e01f2a5543788d3a49777 (diff) | |
| download | lwn-2f4348e5a86198704368a699a7c4cdeb21d569f5.tar.gz lwn-2f4348e5a86198704368a699a7c4cdeb21d569f5.zip | |
EDAC/skx_common: Add new ADXL components for 2-level memory
Some Intel servers may configure memory in 2 levels, using
fast "near" memory (e.g. DDR) as a cache for larger, slower,
"far" memory (e.g. 3D X-point).
In these configurations the BIOS ADXL address translation for
an address in a 2-level memory range will provide details of
both the "near" and far components.
Current exported ADXL components are only for 1-level memory
system or for 2nd level memory of 2-level memory system. So
add new ADXL components for 1st level memory of 2-level memory
system to fully support 2-level memory system and the detection
of memory error source(1st level memory or 2nd level memory).
Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/20210611170123.1057025-2-tony.luck@intel.com
Diffstat (limited to 'drivers/edac/skx_common.h')
| -rw-r--r-- | drivers/edac/skx_common.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/edac/skx_common.h b/drivers/edac/skx_common.h index bf56bebff138..8b5a49058ce4 100644 --- a/drivers/edac/skx_common.h +++ b/drivers/edac/skx_common.h @@ -9,6 +9,8 @@ #ifndef _SKX_COMM_EDAC_H #define _SKX_COMM_EDAC_H +#include <linux/bits.h> + #define MSG_SIZE 1024 /* @@ -92,9 +94,17 @@ enum { INDEX_MEMCTRL, INDEX_CHANNEL, INDEX_DIMM, + INDEX_NM_FIRST, + INDEX_NM_MEMCTRL = INDEX_NM_FIRST, + INDEX_NM_CHANNEL, + INDEX_NM_DIMM, INDEX_MAX }; +#define BIT_NM_MEMCTRL BIT_ULL(INDEX_NM_MEMCTRL) +#define BIT_NM_CHANNEL BIT_ULL(INDEX_NM_CHANNEL) +#define BIT_NM_DIMM BIT_ULL(INDEX_NM_DIMM) + struct decoded_addr { struct skx_dev *dev; u64 addr; @@ -133,6 +143,7 @@ typedef void (*skx_show_retry_log_f)(struct decoded_addr *res, char *msg, int le int __init skx_adxl_get(void); void __exit skx_adxl_put(void); void skx_set_decode(skx_decode_f decode, skx_show_retry_log_f show_retry_log); +void skx_set_mem_cfg(bool mem_cfg_2lm); int skx_get_src_id(struct skx_dev *d, int off, u8 *id); int skx_get_node_id(struct skx_dev *d, u8 *id); |