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| author | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2023-05-26 10:58:22 +0100 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2023-05-30 11:20:35 -0700 |
| commit | 1ad3f701c3999904d0c6cdea299df16c6cd9878d (patch) | |
| tree | 7c33090738ab6fb1e3a6ad656585ba3089d5d128 /drivers/cxl/pci.c | |
| parent | d717d7f3df18494baafd9595fb4bcb9c380d7389 (diff) | |
| download | lwn-1ad3f701c3999904d0c6cdea299df16c6cd9878d.tar.gz lwn-1ad3f701c3999904d0c6cdea299df16c6cd9878d.zip | |
cxl/pci: Find and register CXL PMU devices
CXL PMU devices can be found from entries in the Register
Locator DVSEC.
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20230526095824.16336-4-Jonathan.Cameron@huawei.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/cxl/pci.c')
| -rw-r--r-- | drivers/cxl/pci.c | 26 |
1 files changed, 25 insertions, 1 deletions
diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c index 0872f2233ed0..4c3bd20ec7c8 100644 --- a/drivers/cxl/pci.c +++ b/drivers/cxl/pci.c @@ -13,6 +13,7 @@ #include "cxlmem.h" #include "cxlpci.h" #include "cxl.h" +#include "pmu.h" /** * DOC: cxl pci @@ -657,7 +658,7 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) struct cxl_register_map map; struct cxl_memdev *cxlmd; struct cxl_dev_state *cxlds; - int rc; + int i, rc, pmu_count; /* * Double check the anonymous union trickery in struct cxl_regs @@ -746,6 +747,29 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) if (IS_ERR(cxlmd)) return PTR_ERR(cxlmd); + pmu_count = cxl_count_regblock(pdev, CXL_REGLOC_RBI_PMU); + for (i = 0; i < pmu_count; i++) { + struct cxl_pmu_regs pmu_regs; + + rc = cxl_find_regblock_instance(pdev, CXL_REGLOC_RBI_PMU, &map, i); + if (rc) { + dev_dbg(&pdev->dev, "Could not find PMU regblock\n"); + break; + } + + rc = cxl_map_pmu_regs(pdev, &pmu_regs, &map); + if (rc) { + dev_dbg(&pdev->dev, "Could not map PMU regs\n"); + break; + } + + rc = devm_cxl_pmu_add(cxlds->dev, &pmu_regs, cxlmd->id, i, CXL_PMU_MEMDEV); + if (rc) { + dev_dbg(&pdev->dev, "Could not add PMU instance\n"); + break; + } + } + rc = cxl_event_config(host_bridge, cxlds); if (rc) return rc; |