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| author | Giovanni Cabiddu <giovanni.cabiddu@intel.com> | 2020-10-12 21:38:40 +0100 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2020-10-30 17:34:57 +1100 |
| commit | 185aa9c3543e5b7303e3e9c97a9b8f06fec04afe (patch) | |
| tree | cdc97d49d02cf05efd3af93065c817f28270d613 /drivers/crypto/qat/qat_common/adf_sriov.c | |
| parent | 264f590f2beb80d29dc33d5b60f93d2787f429b8 (diff) | |
| download | lwn-185aa9c3543e5b7303e3e9c97a9b8f06fec04afe.tar.gz lwn-185aa9c3543e5b7303e3e9c97a9b8f06fec04afe.zip | |
crypto: qat - call functions in adf_sriov if available
Call the function configure_iov_threads(), adf_enable_vf2pf_interrupts()
and adf_pf2vf_notify_restarting() only if present in the struct
adf_hw_device_data of the device.
This is to allow for QAT drivers that do not implement those functions.
Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Reviewed-by: Wojciech Ziemba <wojciech.ziemba@intel.com>
Reviewed-by: Maksim Lukoshkov <maksim.lukoshkov@intel.com>
Reviewed-by: Fiona Trahe <fiona.trahe@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/qat/qat_common/adf_sriov.c')
| -rw-r--r-- | drivers/crypto/qat/qat_common/adf_sriov.c | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/drivers/crypto/qat/qat_common/adf_sriov.c b/drivers/crypto/qat/qat_common/adf_sriov.c index 9a0f6db83106..d887640355d4 100644 --- a/drivers/crypto/qat/qat_common/adf_sriov.c +++ b/drivers/crypto/qat/qat_common/adf_sriov.c @@ -62,10 +62,12 @@ static int adf_enable_sriov(struct adf_accel_dev *accel_dev) } /* Set Valid bits in AE Thread to PCIe Function Mapping */ - hw_data->configure_iov_threads(accel_dev, true); + if (hw_data->configure_iov_threads) + hw_data->configure_iov_threads(accel_dev, true); /* Enable VF to PF interrupts for all VFs */ - adf_enable_vf2pf_interrupts(accel_dev, BIT_ULL(totalvfs) - 1); + if (hw_data->get_pf2vf_offset) + adf_enable_vf2pf_interrupts(accel_dev, BIT_ULL(totalvfs) - 1); /* * Due to the hardware design, when SR-IOV and the ring arbiter @@ -94,15 +96,18 @@ void adf_disable_sriov(struct adf_accel_dev *accel_dev) if (!accel_dev->pf.vf_info) return; - adf_pf2vf_notify_restarting(accel_dev); + if (hw_data->get_pf2vf_offset) + adf_pf2vf_notify_restarting(accel_dev); pci_disable_sriov(accel_to_pci_dev(accel_dev)); /* Disable VF to PF interrupts */ - adf_disable_vf2pf_interrupts(accel_dev, GENMASK(31, 0)); + if (hw_data->get_pf2vf_offset) + adf_disable_vf2pf_interrupts(accel_dev, GENMASK(31, 0)); /* Clear Valid bits in AE Thread to PCIe Function Mapping */ - hw_data->configure_iov_threads(accel_dev, false); + if (hw_data->configure_iov_threads) + hw_data->configure_iov_threads(accel_dev, false); for (i = 0, vf = accel_dev->pf.vf_info; i < totalvfs; i++, vf++) { tasklet_disable(&vf->vf2pf_bh_tasklet); |