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authorTomasz Kowalik <tomaszx.kowalik@intel.com>2021-12-16 09:13:34 +0000
committerHerbert Xu <herbert@gondor.apana.org.au>2021-12-24 14:18:27 +1100
commit0cec19c761e5cc8d6fa43df622791e941b7a8033 (patch)
tree79ddb4cc627c8264868ad0740fb093e591a78400 /drivers/crypto/qat/qat_common/adf_sriov.c
parentbeb1e6d71f0ef906ff986710fdd4ad4fc1542302 (diff)
downloadlwn-0cec19c761e5cc8d6fa43df622791e941b7a8033.tar.gz
lwn-0cec19c761e5cc8d6fa43df622791e941b7a8033.zip
crypto: qat - add support for compression for 4xxx
Add the logic required to enable the compression service for 4xxx devices. This allows to load the compression firmware image and report the appropriate compression capabilities. The firmware image selection for a given device is based on the 'ServicesEnabled' key stored in the internal configuration, which is added statically at the probe of the device according to the following rule, by default: - odd numbered devices assigned to compression services - even numbered devices assigned to crypto services In addition, restore the 'ServicesEnabled' key, if present, when SRIOV is enabled on the device. Signed-off-by: Tomasz Kowalik <tomaszx.kowalik@intel.com> Co-developed-by: Mateuszx Potrola <mateuszx.potrola@intel.com> Signed-off-by: Mateuszx Potrola <mateuszx.potrola@intel.com> Co-developed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Marco Chiappero <marco.chiappero@intel.com> Reviewed-by: Fiona Trahe <fiona.trahe@intel.com> Reviewed-by: Marco Chiappero <marco.chiappero@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/qat/qat_common/adf_sriov.c')
-rw-r--r--drivers/crypto/qat/qat_common/adf_sriov.c31
1 files changed, 29 insertions, 2 deletions
diff --git a/drivers/crypto/qat/qat_common/adf_sriov.c b/drivers/crypto/qat/qat_common/adf_sriov.c
index 971a05d62418..b960bca1f9d2 100644
--- a/drivers/crypto/qat/qat_common/adf_sriov.c
+++ b/drivers/crypto/qat/qat_common/adf_sriov.c
@@ -126,6 +126,32 @@ void adf_disable_sriov(struct adf_accel_dev *accel_dev)
}
EXPORT_SYMBOL_GPL(adf_disable_sriov);
+static int adf_sriov_prepare_restart(struct adf_accel_dev *accel_dev)
+{
+ char services[ADF_CFG_MAX_VAL_LEN_IN_BYTES] = {0};
+ int ret;
+
+ ret = adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC,
+ ADF_SERVICES_ENABLED, services);
+
+ adf_dev_stop(accel_dev);
+ adf_dev_shutdown(accel_dev);
+
+ if (!ret) {
+ ret = adf_cfg_section_add(accel_dev, ADF_GENERAL_SEC);
+ if (ret)
+ return ret;
+
+ ret = adf_cfg_add_key_value_param(accel_dev, ADF_GENERAL_SEC,
+ ADF_SERVICES_ENABLED,
+ services, ADF_STR);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
/**
* adf_sriov_configure() - Enable SRIOV for the device
* @pdev: Pointer to PCI device.
@@ -165,8 +191,9 @@ int adf_sriov_configure(struct pci_dev *pdev, int numvfs)
return -EBUSY;
}
- adf_dev_stop(accel_dev);
- adf_dev_shutdown(accel_dev);
+ ret = adf_sriov_prepare_restart(accel_dev);
+ if (ret)
+ return ret;
}
if (adf_cfg_section_add(accel_dev, ADF_KERNEL_SEC))