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authorMario Limonciello <mario.limonciello@amd.com>2024-10-28 09:55:41 -0500
committerMario Limonciello <mario.limonciello@amd.com>2024-10-29 08:31:57 -0500
commit3ac757e8db3deacc8058912d55efd1390f985d80 (patch)
tree69f74e024d746c5cb99e9d6766682bbbff8beee7 /drivers/cpufreq
parenta6960e6b1b0e2cb268f427a99040c408a8d10665 (diff)
downloadlwn-3ac757e8db3deacc8058912d55efd1390f985d80.tar.gz
lwn-3ac757e8db3deacc8058912d55efd1390f985d80.zip
cpufreq/amd-pstate: Push adjust_perf vfunc init into cpu_init
As the driver can be changed in and out of different modes it's possible that adjust_perf is assigned when it shouldn't be. This could happen if an MSR design is started up in passive mode and then switches to active mode. To solve this explicitly clear `adjust_perf` in amd_pstate_epp_cpu_init(). Tested-by: Klara Modin <klarasmodin@gmail.com> Tested-by: Dhananjay Ugwekar <dhananjay.ugwekar@amd.com> Link: https://lore.kernel.org/r/20241028145542.1739160-1-superm1@kernel.org Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Diffstat (limited to 'drivers/cpufreq')
-rw-r--r--drivers/cpufreq/amd-pstate.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
index 206725219d8c..e480da818d6f 100644
--- a/drivers/cpufreq/amd-pstate.c
+++ b/drivers/cpufreq/amd-pstate.c
@@ -1504,6 +1504,8 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy)
WRITE_ONCE(cpudata->cppc_cap1_cached, value);
}
+ current_pstate_driver->adjust_perf = NULL;
+
return 0;
free_cpudata1:
@@ -1866,8 +1868,6 @@ static int __init amd_pstate_init(void)
/* capability check */
if (cpu_feature_enabled(X86_FEATURE_CPPC)) {
pr_debug("AMD CPPC MSR based functionality is supported\n");
- if (cppc_state != AMD_PSTATE_ACTIVE)
- current_pstate_driver->adjust_perf = amd_pstate_adjust_perf;
} else {
pr_debug("AMD CPPC shared memory based functionality is supported\n");
static_call_update(amd_pstate_cppc_enable, shmem_cppc_enable);