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authorMichael Srba <Michael.Srba@seznam.cz>2022-04-11 09:21:54 +0200
committerBjorn Andersson <bjorn.andersson@linaro.org>2022-04-19 12:02:04 -0500
commit0b9fe9b7792f31674fbc8eb165c3b22a32d0a434 (patch)
treed726ea6a325c7485727726edec7faa07a0284770 /drivers/bus/Kconfig
parent7b5d44212076e7474bc8d86bcf38829992a14cc2 (diff)
downloadlwn-0b9fe9b7792f31674fbc8eb165c3b22a32d0a434.tar.gz
lwn-0b9fe9b7792f31674fbc8eb165c3b22a32d0a434.zip
dt-bindings: bus: add device tree bindings for qcom,ssc-block-bus
Adds bindings for the AHB bus which exposes the SSC block in the global address space. This bus (and the SSC block itself) is present on certain qcom SoCs. In typical configuration, this bus (as some of the clocks and registers that we need to manipulate) is not accessible to the OS, and the resources on this bus are indirectly accessed by communicating with a hexagon CPU core residing in the SSC block. In this configuration, the hypervisor is the one performing the bus initialization for the purposes of bringing the haxagon CPU core out of reset. However, it is possible to change the configuration, in which case this binding serves to allow the OS to initialize the bus. Signed-off-by: Michael Srba <Michael.Srba@seznam.cz> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220411072156.24451-4-michael.srba@seznam.cz
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