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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2023-08-31 13:52:30 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2023-09-25 09:19:21 +0200 |
| commit | d6c2de6b151069ebc3d24c226e482b10981ead92 (patch) | |
| tree | bbaceda5da38d9767dc721a2cccd8facb8004a55 /arch | |
| parent | dcd96d036db2563314f86f47a27b7dea8d508cfd (diff) | |
| download | lwn-d6c2de6b151069ebc3d24c226e482b10981ead92.tar.gz lwn-d6c2de6b151069ebc3d24c226e482b10981ead92.zip | |
ARM: dts: renesas: blanche: Move Ethernet node to LBSC
The SMSC LAN89218AQ Ethernet controller on the Blanche development board
resides in the external address space of the Local Bus State Controller
(LBSC). Move the Ethernet device node to reflect this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/457239047bc8b5deabf15d816043a89ab00db5ef.1693481518.git.geert+renesas@glider.be
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/renesas/r8a7792-blanche.dts | 32 |
1 files changed, 17 insertions, 15 deletions
diff --git a/arch/arm/boot/dts/renesas/r8a7792-blanche.dts b/arch/arm/boot/dts/renesas/r8a7792-blanche.dts index 6a83923aa461..e793134f32a3 100644 --- a/arch/arm/boot/dts/renesas/r8a7792-blanche.dts +++ b/arch/arm/boot/dts/renesas/r8a7792-blanche.dts @@ -39,21 +39,6 @@ regulator-always-on; }; - ethernet@18000000 { - compatible = "smsc,lan89218", "smsc,lan9115"; - reg = <0 0x18000000 0 0x100>; - phy-mode = "mii"; - interrupt-parent = <&irqc>; - interrupts = <0 IRQ_TYPE_EDGE_FALLING>; - smsc,irq-push-pull; - reg-io-width = <4>; - vddvario-supply = <&d3_3v>; - vdd33a-supply = <&d3_3v>; - - pinctrl-0 = <&lan89218_pins>; - pinctrl-names = "default"; - }; - vga-encoder { compatible = "adi,adv7123"; @@ -196,6 +181,23 @@ clock-frequency = <48000000>; }; +&lbsc { + ethernet@18000000 { + compatible = "smsc,lan89218", "smsc,lan9115"; + reg = <0x18000000 0x100>; + phy-mode = "mii"; + interrupt-parent = <&irqc>; + interrupts = <0 IRQ_TYPE_EDGE_FALLING>; + smsc,irq-push-pull; + reg-io-width = <4>; + vddvario-supply = <&d3_3v>; + vdd33a-supply = <&d3_3v>; + + pinctrl-0 = <&lan89218_pins>; + pinctrl-names = "default"; + }; +}; + &pfc { scif0_pins: scif0 { groups = "scif0_data"; |