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authorVladimir Oltean <vladimir.oltean@nxp.com>2021-10-24 20:17:53 +0300
committerDavid S. Miller <davem@davemloft.net>2021-10-25 12:59:42 +0100
commitcf231b436f7ceaf0d87016eedf830677c0c1f7dc (patch)
tree34fe02380808836580cf791d6d6b7bb36eb78d27 /arch
parentf7eb4a1c0864821fe99edf12aca09739f9cbd7a4 (diff)
downloadlwn-cf231b436f7ceaf0d87016eedf830677c0c1f7dc.tar.gz
lwn-cf231b436f7ceaf0d87016eedf830677c0c1f7dc.zip
net: dsa: lantiq_gswip: serialize access to the PCE registers
The GSWIP switch accesses various bridging layer tables (VLANs, FDBs, forwarding rules) indirectly through PCE registers. These hardware accesses are non-atomic, being comprised of several register reads and writes. These accesses are currently serialized by the rtnl_lock, but DSA is changing its driver API and that lock will no longer be held when calling ->port_fdb_add() and ->port_fdb_del(). So this driver needs to serialize the access to the PCE registers using its own locking scheme. This patch adds that. Note that the driver also uses the gswip_pce_load_microcode() function to load a static configuration for the packet classification engine into a table using the same registers. It is currently not protected, but since that configuration is only done from the dsa_switch_ops :: setup method, there is no risk of it being concurrent with other operations. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Acked-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch')
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