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authorH. Peter Anvin <hpa@zytor.com>2009-02-24 16:11:51 -0800
committerH. Peter Anvin <hpa@zytor.com>2009-02-24 16:11:51 -0800
commit638bee71c83a2837b48062fdc5b222163cf53d79 (patch)
tree9c1699c07a5aa547d769138317279b8ee1ba89e8 /arch/x86/kernel/cpu/mcheck/mce_intel_64.c
parent2aaa822984b97efd894d10d1e1382206ef0291a7 (diff)
parenta852cbfaaf8122827602027b1614971cfd832304 (diff)
downloadlwn-638bee71c83a2837b48062fdc5b222163cf53d79.tar.gz
lwn-638bee71c83a2837b48062fdc5b222163cf53d79.zip
Merge branch 'x86/core' into x86/mce2
Diffstat (limited to 'arch/x86/kernel/cpu/mcheck/mce_intel_64.c')
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce_intel_64.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
index 7a2e10fcfa34..aaa7d9730938 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
@@ -9,6 +9,7 @@
#include <linux/interrupt.h>
#include <linux/percpu.h>
#include <asm/processor.h>
+#include <asm/apic.h>
#include <asm/msr.h>
#include <asm/mce.h>
#include <asm/hw_irq.h>
@@ -51,13 +52,13 @@ static void intel_init_thermal(struct cpuinfo_x86 *c)
*/
rdmsr(MSR_IA32_MISC_ENABLE, l, h);
h = apic_read(APIC_LVTTHMR);
- if ((l & (1 << 3)) && (h & APIC_DM_SMI)) {
+ if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {
printk(KERN_DEBUG
"CPU%d: Thermal monitoring handled by SMI\n", cpu);
return;
}
- if (cpu_has(c, X86_FEATURE_TM2) && (l & (1 << 13)))
+ if (cpu_has(c, X86_FEATURE_TM2) && (l & MSR_IA32_MISC_ENABLE_TM2))
tm2 = 1;
if (h & APIC_VECTOR_MASK) {
@@ -75,7 +76,7 @@ static void intel_init_thermal(struct cpuinfo_x86 *c)
wrmsr(MSR_IA32_THERM_INTERRUPT, l | 0x03, h);
rdmsr(MSR_IA32_MISC_ENABLE, l, h);
- wrmsr(MSR_IA32_MISC_ENABLE, l | (1 << 3), h);
+ wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h);
l = apic_read(APIC_LVTTHMR);
apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);