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authorAtish Patra <atish.patra@wdc.com>2019-04-24 14:47:59 -0700
committerPalmer Dabbelt <palmer@sifive.com>2019-04-30 09:47:45 -0700
commitab3d26500547369c24a6c1c31725fd2841a57d0c (patch)
tree1e23b51e00a4fabd4fde9a821b47ab7a7a02120a /arch/riscv
parent70114560b2855853126c65cccdc49a33187327d0 (diff)
downloadlwn-ab3d26500547369c24a6c1c31725fd2841a57d0c.tar.gz
lwn-ab3d26500547369c24a6c1c31725fd2841a57d0c.zip
RISC-V: Implement nosmp commandline option.
nosmp command line option sets max_cpus to zero. No secondary harts will boot if this is enabled. But present cpu mask will still point to all possible masks. Fix present cpu mask for nosmp usecase. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'arch/riscv')
-rw-r--r--arch/riscv/kernel/smpboot.c12
1 files changed, 11 insertions, 1 deletions
diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
index eb533b5c2c8c..a8ad200581aa 100644
--- a/arch/riscv/kernel/smpboot.c
+++ b/arch/riscv/kernel/smpboot.c
@@ -47,6 +47,17 @@ void __init smp_prepare_boot_cpu(void)
void __init smp_prepare_cpus(unsigned int max_cpus)
{
+ int cpuid;
+
+ /* This covers non-smp usecase mandated by "nosmp" option */
+ if (max_cpus == 0)
+ return;
+
+ for_each_possible_cpu(cpuid) {
+ if (cpuid == smp_processor_id())
+ continue;
+ set_cpu_present(cpuid, true);
+ }
}
void __init setup_smp(void)
@@ -74,7 +85,6 @@ void __init setup_smp(void)
cpuid_to_hartid_map(cpuid) = hart;
set_cpu_possible(cpuid, true);
- set_cpu_present(cpuid, true);
cpuid++;
}