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author | Clément Léger <cleger@rivosinc.com> | 2023-10-24 15:26:52 +0200 |
---|---|---|
committer | Palmer Dabbelt <palmer@rivosinc.com> | 2023-11-06 09:42:47 -0800 |
commit | 76329c693924d8f37afbf361f0d8daab594e1644 (patch) | |
tree | d094e157fd0d3d01e0e6cd608cce920b75b1ec38 /arch/riscv/kernel/head.S | |
parent | b18f7296fbfdb2ad0871f00f3042fc74663d52ac (diff) | |
download | lwn-76329c693924d8f37afbf361f0d8daab594e1644.tar.gz lwn-76329c693924d8f37afbf361f0d8daab594e1644.zip |
riscv: Use SYM_*() assembly macros instead of deprecated ones
ENTRY()/END()/WEAK() macros are deprecated and we should make use of the
new SYM_*() macros [1] for better annotation of symbols. Replace the
deprecated ones with the new ones and fix wrong usage of END()/ENDPROC()
to correctly describe the symbols.
[1] https://docs.kernel.org/core-api/asm-annotations.html
Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Link: https://lore.kernel.org/r/20231024132655.730417-3-cleger@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/riscv/kernel/head.S')
-rw-r--r-- | arch/riscv/kernel/head.S | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S index 0c0432eb57d7..b77397432403 100644 --- a/arch/riscv/kernel/head.S +++ b/arch/riscv/kernel/head.S @@ -19,7 +19,7 @@ #include "efi-header.S" __HEAD -ENTRY(_start) +SYM_CODE_START(_start) /* * Image header expected by Linux boot-loaders. The image header data * structure is described in asm/image.h. @@ -187,9 +187,9 @@ secondary_start_sbi: wfi j .Lsecondary_park -END(_start) +SYM_CODE_END(_start) -ENTRY(_start_kernel) +SYM_CODE_START(_start_kernel) /* Mask all interrupts */ csrw CSR_IE, zero csrw CSR_IP, zero @@ -348,10 +348,10 @@ ENTRY(_start_kernel) tail .Lsecondary_start_common #endif /* CONFIG_RISCV_BOOT_SPINWAIT */ -END(_start_kernel) +SYM_CODE_END(_start_kernel) #ifdef CONFIG_RISCV_M_MODE -ENTRY(reset_regs) +SYM_CODE_START_LOCAL(reset_regs) li sp, 0 li gp, 0 li tp, 0 @@ -449,5 +449,5 @@ ENTRY(reset_regs) .Lreset_regs_done_vector: #endif /* CONFIG_RISCV_ISA_V */ ret -END(reset_regs) +SYM_CODE_END(reset_regs) #endif /* CONFIG_RISCV_M_MODE */ |