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author | Vincent Chen <vincent.chen@sifive.com> | 2021-03-22 22:26:04 +0800 |
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committer | Palmer Dabbelt <palmerdabbelt@google.com> | 2021-04-26 08:24:56 -0700 |
commit | 1a0e5dbd3723e1194cc549def69fe7b557d4c72b (patch) | |
tree | 6dc387216e93b22faaeb1ced56ce0b00b40aad8d /arch/riscv/errata/Makefile | |
parent | 6f4eea90465ad0cd5f3d041b9b2c728426f2b8d4 (diff) | |
download | lwn-1a0e5dbd3723e1194cc549def69fe7b557d4c72b.tar.gz lwn-1a0e5dbd3723e1194cc549def69fe7b557d4c72b.zip |
riscv: sifive: Add SiFive alternative ports
Add required ports of the Alternative scheme for SiFive.
Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Diffstat (limited to 'arch/riscv/errata/Makefile')
-rw-r--r-- | arch/riscv/errata/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/riscv/errata/Makefile b/arch/riscv/errata/Makefile index 43e6d5424367..b8f8740a3e44 100644 --- a/arch/riscv/errata/Makefile +++ b/arch/riscv/errata/Makefile @@ -1 +1,2 @@ obj-y += alternative.o +obj-$(CONFIG_ERRATA_SIFIVE) += sifive/ |