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| author | Will Deacon <will.deacon@arm.com> | 2012-11-07 17:00:05 +0000 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2012-11-08 16:06:21 +0000 |
| commit | b3770b3252589240e50f560197a19531979abba2 (patch) | |
| tree | 19d41ca9a8c8ea9b10a9e40ccd53faecb13d5a32 /arch/openrisc | |
| parent | 6212a512240f48d84090bc42a24d6dfb033754bc (diff) | |
| download | lwn-b3770b3252589240e50f560197a19531979abba2.tar.gz lwn-b3770b3252589240e50f560197a19531979abba2.zip | |
arm64: smp: add missing completion for secondary boot
Commit 149c24151e85 ("ARM: SMP: use a timing out completion for cpu
hotplug") modified arm's CPU up path to use completions. It seems that
we only got half of this patch for arm64, so add the missing call to
complete.
Reported-by: Jon Brawn <jon.brawn@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/openrisc')
0 files changed, 0 insertions, 0 deletions