summaryrefslogtreecommitdiff
path: root/arch/openrisc/boot
diff options
context:
space:
mode:
authorJoel Stanley <joel@jms.id.au>2021-08-26 22:59:44 +0930
committerStafford Horne <shorne@gmail.com>2021-08-31 22:41:46 +0900
commit7851155a1a7c33f2270dcd979ab6532a89be5293 (patch)
tree57957eca90ac506bb7e3d570815261d1a8e00155 /arch/openrisc/boot
parent94effcedaa543825ad9c80831450d4fbfa284880 (diff)
downloadlwn-7851155a1a7c33f2270dcd979ab6532a89be5293.tar.gz
lwn-7851155a1a7c33f2270dcd979ab6532a89be5293.zip
openrisc/litex: Update uart address
Recent litex socs will place the UART at 0xe0006800. Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Stafford Horne <shorne@gmail.com>
Diffstat (limited to 'arch/openrisc/boot')
-rw-r--r--arch/openrisc/boot/dts/or1klitex.dts4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/openrisc/boot/dts/or1klitex.dts b/arch/openrisc/boot/dts/or1klitex.dts
index 3f9867aa3844..baba4f49fa6b 100644
--- a/arch/openrisc/boot/dts/or1klitex.dts
+++ b/arch/openrisc/boot/dts/or1klitex.dts
@@ -41,10 +41,10 @@
interrupt-controller;
};
- serial0: serial@e0002000 {
+ serial0: serial@e0006800 {
device_type = "serial";
compatible = "litex,liteuart";
- reg = <0xe0002000 0x100>;
+ reg = <0xe0006800 0x100>;
};
soc_ctrl0: soc_controller@e0000000 {