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author | Fenghua Yu <fenghua.yu@intel.com> | 2008-10-17 12:14:13 -0700 |
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committer | Tony Luck <tony.luck@intel.com> | 2008-10-17 12:14:13 -0700 |
commit | 62fdd7678a26efadd6ac5c2869543caff77d2df0 (patch) | |
tree | 0dd67208590c4540ff6a4476579a55bcac0d1fce /arch/ia64/dig/machvec_vtd.c | |
parent | 6bb7a935489dab20802dde6c2cb7d8582f4849bf (diff) | |
download | lwn-62fdd7678a26efadd6ac5c2869543caff77d2df0.tar.gz lwn-62fdd7678a26efadd6ac5c2869543caff77d2df0.zip |
[IA64] Add Variable Page Size and IA64 Support in Intel IOMMU
The patch contains Intel IOMMU IA64 specific code. It defines new
machvec dig_vtd, hooks for IOMMU, DMAR table detection, cache line flush
function, etc.
For a generic kernel with CONFIG_DMAR=y, if Intel IOMMU is detected,
dig_vtd is used for machinve vector. Otherwise, kernel falls back to
dig machine vector. Kernel parameter "machvec=dig" or "intel_iommu=off"
can be used to force kernel to boot dig machine vector.
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64/dig/machvec_vtd.c')
-rw-r--r-- | arch/ia64/dig/machvec_vtd.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/ia64/dig/machvec_vtd.c b/arch/ia64/dig/machvec_vtd.c new file mode 100644 index 000000000000..7cd3eb471cad --- /dev/null +++ b/arch/ia64/dig/machvec_vtd.c @@ -0,0 +1,3 @@ +#define MACHVEC_PLATFORM_NAME dig_vtd +#define MACHVEC_PLATFORM_HEADER <asm/machvec_dig_vtd.h> +#include <asm/machvec_init.h> |