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| author | Mike Frysinger <vapier.adi@gmail.com> | 2009-01-07 23:14:38 +0800 |
|---|---|---|
| committer | Bryan Wu <cooloney@kernel.org> | 2009-01-07 23:14:38 +0800 |
| commit | 6651ece9e257302ee695ee76e69a4427f7033235 (patch) | |
| tree | ee9862184884b179ec89a0a2527a7b56279c1402 /arch/blackfin/mach-bf561 | |
| parent | a0dcfb16e606ca095eb1e9e789aff5e41e9adb1a (diff) | |
| download | lwn-6651ece9e257302ee695ee76e69a4427f7033235.tar.gz lwn-6651ece9e257302ee695ee76e69a4427f7033235.zip | |
Blackfin arch: update anomaly headers to match latest sheets
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-bf561')
| -rw-r--r-- | arch/blackfin/mach-bf561/include/mach/anomaly.h | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/arch/blackfin/mach-bf561/include/mach/anomaly.h b/arch/blackfin/mach-bf561/include/mach/anomaly.h index 4d4884b3c636..1a9e17562821 100644 --- a/arch/blackfin/mach-bf561/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf561/include/mach/anomaly.h @@ -7,7 +7,7 @@ */ /* This file shoule be up to date with: - * - Revision P, 02/08/2008; ADSP-BF561 Blackfin Processor Anomaly List + * - Revision Q, 11/07/2008; ADSP-BF561 Blackfin Processor Anomaly List */ #ifndef _MACH_ANOMALY_H_ @@ -264,6 +264,16 @@ #define ANOMALY_05000371 (1) /* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */ #define ANOMALY_05000403 (1) +/* TESTSET Instruction Causes Data Corruption with Writeback Data Cache Enabled */ +#define ANOMALY_05000412 (1) +/* Speculative Fetches Can Cause Undesired External FIFO Operations */ +#define ANOMALY_05000416 (1) +/* Multichannel SPORT Channel Misalignment Under Specific Configuration */ +#define ANOMALY_05000425 (1) +/* Speculative Fetches of Indirect-Pointer Instructions Can Cause False Hardware Errors */ +#define ANOMALY_05000426 (1) +/* Lost/Corrupted L2/L3 Memory Write after Speculative L2 Memory Read by Core B */ +#define ANOMALY_05000428 (__SILICON_REVISION__ > 3) /* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */ #define ANOMALY_05000443 (1) @@ -274,6 +284,7 @@ #define ANOMALY_05000311 (0) #define ANOMALY_05000353 (1) #define ANOMALY_05000386 (1) +#define ANOMALY_05000432 (0) #define ANOMALY_05000435 (0) #endif |