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authorMark Brown <broonie@kernel.org>2019-11-21 13:51:32 +0000
committerCatalin Marinas <catalin.marinas@arm.com>2019-12-04 11:44:29 +0000
commitcba779d80a5d4ccb8bdeb799abd02bf7ba9be111 (patch)
tree73a9c87f51af80fc98754ac390e7bdd8ef3a1d23 /arch/arm64/mm
parentca2ef4ffabbef25644e02a98b0f48869f8be0375 (diff)
downloadlwn-cba779d80a5d4ccb8bdeb799abd02bf7ba9be111.tar.gz
lwn-cba779d80a5d4ccb8bdeb799abd02bf7ba9be111.zip
arm64: mm: Fix column alignment for UXN in kernel_page_tables
UXN is the only individual PTE bit other than the PTE_ATTRINDX_MASK ones which doesn't have both a set and a clear value provided, meaning that the columns in the table won't all be aligned. The PTE_ATTRINDX_MASK values are all both mutually exclusive and longer so are listed last to make a single final column for those values. Ensure everything is aligned by providing a clear value for UXN. Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/mm')
-rw-r--r--arch/arm64/mm/dump.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/mm/dump.c b/arch/arm64/mm/dump.c
index 93f9f77582ae..0a920b538a89 100644
--- a/arch/arm64/mm/dump.c
+++ b/arch/arm64/mm/dump.c
@@ -142,6 +142,7 @@ static const struct prot_bits pte_bits[] = {
.mask = PTE_UXN,
.val = PTE_UXN,
.set = "UXN",
+ .clear = " ",
}, {
.mask = PTE_ATTRINDX_MASK,
.val = PTE_ATTRINDX(MT_DEVICE_nGnRnE),