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authorCatalin Marinas <catalin.marinas@arm.com>2019-10-28 09:08:34 +0000
committerCatalin Marinas <catalin.marinas@arm.com>2019-10-28 09:13:21 +0000
commit27a22fbdeedd6c5c451cf5f830d51782bf50c3a2 (patch)
tree6cd5f814cce7fc2dc9a65d9b465d693f54aee15d /arch/arm64/kernel/sys_compat.c
parent222fc0c8503d98cec3cb2bac2780cdd21a6e31c0 (diff)
downloadlwn-27a22fbdeedd6c5c451cf5f830d51782bf50c3a2.tar.gz
lwn-27a22fbdeedd6c5c451cf5f830d51782bf50c3a2.zip
arm64: Silence clang warning on mismatched value/register sizes
Clang reports a warning on the __tlbi(aside1is, 0) macro expansion since the value size does not match the register size specified in the inline asm. Construct the ASID value using the __TLBI_VADDR() macro. Fixes: 222fc0c8503d ("arm64: compat: Workaround Neoverse-N1 #1542419 for compat user-space") Reported-by: Nathan Chancellor <natechancellor@gmail.com> Cc: James Morse <james.morse@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/kernel/sys_compat.c')
-rw-r--r--arch/arm64/kernel/sys_compat.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/kernel/sys_compat.c b/arch/arm64/kernel/sys_compat.c
index c9fb02927d3e..3c18c2454089 100644
--- a/arch/arm64/kernel/sys_compat.c
+++ b/arch/arm64/kernel/sys_compat.c
@@ -37,7 +37,7 @@ __do_compat_cache_op(unsigned long start, unsigned long end)
* The workaround requires an inner-shareable tlbi.
* We pick the reserved-ASID to minimise the impact.
*/
- __tlbi(aside1is, 0);
+ __tlbi(aside1is, __TLBI_VADDR(0, 0));
dsb(ish);
}