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authorZhou Wang <wangzhou1@hisilicon.com>2020-05-09 10:05:18 +0800
committerWei Xu <xuwei5@hisilicon.com>2020-05-15 09:29:47 +0800
commit528443e32a3d53000d30bb8be04a382b04e57470 (patch)
tree8fc5963b6d45a35fc9d8db6f11f2c50dccfff79c /arch/arm64/configs/defconfig
parent8f3d9f354286745c751374f5f1fcafee6b3f3136 (diff)
downloadlwn-528443e32a3d53000d30bb8be04a382b04e57470.tar.gz
lwn-528443e32a3d53000d30bb8be04a382b04e57470.zip
arm64: defconfig: Enable UACCE/PCI PASID/SEC2/HPRE configs
Enable configs for UACCE, PCI PASID, HiSilicon SEC2 and HPRE drivers. Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Diffstat (limited to 'arch/arm64/configs/defconfig')
-rw-r--r--arch/arm64/configs/defconfig4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 24e534d85045..82a9df58040f 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -188,6 +188,7 @@ CONFIG_NET_9P_VIRTIO=y
CONFIG_PCI=y
CONFIG_PCIEPORTBUS=y
CONFIG_PCI_IOV=y
+CONFIG_PCI_PASID=y
CONFIG_HOTPLUG_PCI=y
CONFIG_HOTPLUG_PCI_ACPI=y
CONFIG_PCI_AARDVARK=y
@@ -241,6 +242,7 @@ CONFIG_BLK_DEV_NVME=m
CONFIG_SRAM=y
CONFIG_EEPROM_AT24=m
CONFIG_EEPROM_AT25=m
+CONFIG_UACCE=m
# CONFIG_SCSI_PROC_FS is not set
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_SAS_ATA=y
@@ -968,7 +970,9 @@ CONFIG_CRYPTO_DEV_FSL_CAAM=m
CONFIG_CRYPTO_DEV_FSL_DPAA2_CAAM=m
CONFIG_CRYPTO_DEV_QCOM_RNG=m
CONFIG_CRYPTO_DEV_CCREE=m
+CONFIG_CRYPTO_DEV_HISI_SEC2=m
CONFIG_CRYPTO_DEV_HISI_ZIP=m
+CONFIG_CRYPTO_DEV_HISI_HPRE=m
CONFIG_CMA_SIZE_MBYTES=32
CONFIG_PRINTK_TIME=y
CONFIG_DEBUG_INFO=y