diff options
| author | Aswath Govindraju <a-govindraju@ti.com> | 2021-06-16 22:42:23 +0530 |
|---|---|---|
| committer | Nishanth Menon <nm@ti.com> | 2021-06-16 19:05:28 -0500 |
| commit | 454a9d4aaacb89daea350d21628992bb83de649f (patch) | |
| tree | 524d4908cd3568e7b51c9b016fd7f1a43acafe85 /arch/arm64/boot | |
| parent | 263820efa3fb08cc606736b68290d9be9c46e2e5 (diff) | |
| download | lwn-454a9d4aaacb89daea350d21628992bb83de649f.tar.gz lwn-454a9d4aaacb89daea350d21628992bb83de649f.zip | |
arm64: dts: ti: k3-am64-main: Reserve OCMRAM for DMSC-lite and secure proxy communication
The final 128KB in SRAM is reserved by default for DMSC-lite code and
secure proxy communication buffer. The memory region used for DMSC-lite
code can be optionally freed up by secure firmware API[1]. However, the
buffer for secure proxy communication is not configurable. This default
hardware configuration is unique for AM64.
Therefore, indicate the area reserved for DMSC-lite code and secure proxy
communication buffer in the oc_sram device tree node.
[1] - http://downloads.ti.com/tisci/esd/latest/6_topic_user_guides/security_handover.html#triggering-security-handover
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20210616171224.24635-3-a-govindraju@ti.com
Diffstat (limited to 'arch/arm64/boot')
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi index e918afc2298e..27888ee6f039 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -27,6 +27,14 @@ tfa-sram@0 { reg = <0x0 0x20000>; }; + + dmsc-sram@1e0000 { + reg = <0x1e0000 0x1c000>; + }; + + sproxy-sram@1fc000 { + reg = <0x1fc000 0x4000>; + }; }; main_conf: syscon@43000000 { |