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| author | FUKAUMI Naoki <naoki@radxa.com> | 2024-09-18 16:32:35 +0900 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2024-11-11 16:31:35 +0100 |
| commit | 409e01f32787d7327fd732396d08c52051ab4746 (patch) | |
| tree | cc9b31bf22acc446ad25a38e13f4ddcede0e7a7d /arch/arm64/boot | |
| parent | 3ddf5cdb77e6efd6fe9b70f36dec935e324a3cd2 (diff) | |
| download | lwn-409e01f32787d7327fd732396d08c52051ab4746.tar.gz lwn-409e01f32787d7327fd732396d08c52051ab4746.zip | |
arm64: dts: rockchip: use less broad pinctrl for pcie3x1 on Radxa E25
To avoid conflict with sdmmc_det, change pci3x1 pinctrl-0 name.
Only the reset-pin is actually needed.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://lore.kernel.org/r/20240918073236.648-1-naoki@radxa.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64/boot')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts b/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts index 1aa3b97e4fd5..98cfa3abb809 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts @@ -124,7 +124,7 @@ &pcie3x1 { num-lanes = <1>; pinctrl-names = "default"; - pinctrl-0 = <&pcie30x1m0_pins>; + pinctrl-0 = <&pcie30x1_reset_h>; reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>; vpcie3v3-supply = <&vcc3v3_minipcie>; status = "okay"; @@ -149,6 +149,10 @@ rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; }; + pcie30x1_reset_h: pcie30x1-reset-h { + rockchip,pins = <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + pcie30x2_reset_h: pcie30x2-reset-h { rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; }; |