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authorCaesar Wang <wxt@rock-chips.com>2015-09-25 10:14:58 +0800
committerHeiko Stuebner <heiko@sntech.de>2015-12-12 23:20:38 +0100
commitb8084e5b34e83875846053bf9cd951b7640e40fe (patch)
treeb76c7bc8c75b4874a7c023f5d3be28de35b02334 /arch/arm64/boot/dts/rockchip/rk3368.dtsi
parent8fc5abd40efadf57ca43189c9c14c4de3db6300e (diff)
downloadlwn-b8084e5b34e83875846053bf9cd951b7640e40fe.tar.gz
lwn-b8084e5b34e83875846053bf9cd951b7640e40fe.zip
arm64: dts: rockchip: Add the broadcast-timer for RK3368 SoC
There is a need of a broadcast timer in this case to ensure proper wakeup when the cpus are in sleep mode and a timer expires. Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3368.dtsi')
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3368.dtsi6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index d8ccb17b9da0..122777b1441e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -579,6 +579,12 @@
status = "disabled";
};
+ timer@ff810000 {
+ compatible = "rockchip,rk3368-timer", "rockchip,rk3288-timer";
+ reg = <0x0 0xff810000 0x0 0x20>;
+ interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
gic: interrupt-controller@ffb71000 {
compatible = "arm,gic-400";
interrupt-controller;