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author | Rajendra Nayak <rnayak@codeaurora.org> | 2020-06-30 14:15:10 +0530 |
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committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2020-07-13 16:43:21 -0700 |
commit | d91ea1e0e869e1aeb46ad36ad0c0544a7888f9f5 (patch) | |
tree | be1eb857391f94517faa92ba91493514cb8fe503 /arch/arm64/boot/dts/qcom | |
parent | 13cadb34e5932840f0610752c27b416ed2de6199 (diff) | |
download | lwn-d91ea1e0e869e1aeb46ad36ad0c0544a7888f9f5.tar.gz lwn-d91ea1e0e869e1aeb46ad36ad0c0544a7888f9f5.zip |
arm64: dts: sc7180: Add OPP table for all qup devices
qup has a requirement to vote on the performance state of the CX domain
in sc7180 devices. Add OPP tables for these and also add power-domains
property for all qup instances for uart and spi.
i2c does not support scaling and uses a fixed clock.
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/1593506712-24557-3-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom')
-rw-r--r-- | arch/arm64/boot/dts/qcom/sc7180.dtsi | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 34a6d833f014..725a47a977cb 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -697,6 +697,25 @@ status = "disabled"; }; + qup_opp_table: qup-opp-table { + compatible = "operating-points-v2"; + + opp-75000000 { + opp-hz = /bits/ 64 <75000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-128000000 { + opp-hz = /bits/ 64 <128000000>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; + qupv3_id_0: geniqup@8c0000 { compatible = "qcom,geni-se-qup"; reg = <0 0x008c0000 0 0x6000>; @@ -739,6 +758,8 @@ interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SC7180_CX>; + operating-points-v2 = <&qup_opp_table>; interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>, <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>; interconnect-names = "qup-core", "qup-config"; @@ -753,6 +774,8 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart0_default>; interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&rpmhpd SC7180_CX>; + operating-points-v2 = <&qup_opp_table>; interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>, <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>; interconnect-names = "qup-core", "qup-config"; @@ -787,6 +810,8 @@ interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SC7180_CX>; + operating-points-v2 = <&qup_opp_table>; interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>, <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>; interconnect-names = "qup-core", "qup-config"; @@ -801,6 +826,8 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart1_default>; interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&rpmhpd SC7180_CX>; + operating-points-v2 = <&qup_opp_table>; interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>, <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>; interconnect-names = "qup-core", "qup-config"; @@ -833,6 +860,8 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart2_default>; interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&rpmhpd SC7180_CX>; + operating-points-v2 = <&qup_opp_table>; interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>, <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>; interconnect-names = "qup-core", "qup-config"; @@ -867,6 +896,8 @@ interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SC7180_CX>; + operating-points-v2 = <&qup_opp_table>; interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>, <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>; interconnect-names = "qup-core", "qup-config"; @@ -881,6 +912,8 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart3_default>; interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&rpmhpd SC7180_CX>; + operating-points-v2 = <&qup_opp_table>; interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>, <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>; interconnect-names = "qup-core", "qup-config"; @@ -913,6 +946,8 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart4_default>; interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&rpmhpd SC7180_CX>; + operating-points-v2 = <&qup_opp_table>; interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>, <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>; interconnect-names = "qup-core", "qup-config"; @@ -947,6 +982,8 @@ interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SC7180_CX>; + operating-points-v2 = <&qup_opp_table>; interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>, <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>; interconnect-names = "qup-core", "qup-config"; @@ -961,6 +998,8 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart5_default>; interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&rpmhpd SC7180_CX>; + operating-points-v2 = <&qup_opp_table>; interconnects = <&qup_virt MASTER_QUP_CORE_0 &qup_virt SLAVE_QUP_CORE_0>, <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_0>; interconnect-names = "qup-core", "qup-config"; @@ -1010,6 +1049,8 @@ interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SC7180_CX>; + operating-points-v2 = <&qup_opp_table>; interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>, <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>; interconnect-names = "qup-core", "qup-config"; @@ -1024,6 +1065,8 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart6_default>; interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&rpmhpd SC7180_CX>; + operating-points-v2 = <&qup_opp_table>; interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>, <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>; interconnect-names = "qup-core", "qup-config"; @@ -1056,6 +1099,8 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart7_default>; interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&rpmhpd SC7180_CX>; + operating-points-v2 = <&qup_opp_table>; interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>, <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>; interconnect-names = "qup-core", "qup-config"; @@ -1090,6 +1135,8 @@ interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SC7180_CX>; + operating-points-v2 = <&qup_opp_table>; interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>, <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>; interconnect-names = "qup-core", "qup-config"; @@ -1104,6 +1151,8 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart8_default>; interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&rpmhpd SC7180_CX>; + operating-points-v2 = <&qup_opp_table>; interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>, <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>; interconnect-names = "qup-core", "qup-config"; @@ -1136,6 +1185,8 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart9_default>; interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&rpmhpd SC7180_CX>; + operating-points-v2 = <&qup_opp_table>; interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>, <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>; interconnect-names = "qup-core", "qup-config"; @@ -1170,6 +1221,8 @@ interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SC7180_CX>; + operating-points-v2 = <&qup_opp_table>; interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>, <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>; interconnect-names = "qup-core", "qup-config"; @@ -1184,6 +1237,8 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart10_default>; interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&rpmhpd SC7180_CX>; + operating-points-v2 = <&qup_opp_table>; interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>, <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>; interconnect-names = "qup-core", "qup-config"; @@ -1218,6 +1273,8 @@ interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SC7180_CX>; + operating-points-v2 = <&qup_opp_table>; interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>, <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>; interconnect-names = "qup-core", "qup-config"; @@ -1232,6 +1289,8 @@ pinctrl-names = "default"; pinctrl-0 = <&qup_uart11_default>; interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&rpmhpd SC7180_CX>; + operating-points-v2 = <&qup_opp_table>; interconnects = <&qup_virt MASTER_QUP_CORE_1 &qup_virt SLAVE_QUP_CORE_1>, <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_1>; interconnect-names = "qup-core", "qup-config"; |