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| author | Chris Packham <chris.packham@alliedtelesis.co.nz> | 2022-12-15 15:54:02 +1300 |
|---|---|---|
| committer | Gregory CLEMENT <gregory.clement@bootlin.com> | 2023-01-10 10:29:03 +0100 |
| commit | 80502ffab2fa92ba9777e381efea2efddc348d13 (patch) | |
| tree | 6371a96fc99e7de0d130278aa9e4b449923f03ef /arch/arm64/boot/dts/marvell | |
| parent | a4d5d2ef5b1f6cddee0fec35d86404df148b9074 (diff) | |
| download | lwn-80502ffab2fa92ba9777e381efea2efddc348d13.tar.gz lwn-80502ffab2fa92ba9777e381efea2efddc348d13.zip | |
arm64: dts: marvell: AC5/AC5X: Fix address for UART1
The correct address offset is 0x12100.
Fixes: 31be791e26cf ("arm64: dts: marvell: Add UART1-3 for AC5/AC5X")
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Diffstat (limited to 'arch/arm64/boot/dts/marvell')
| -rw-r--r-- | arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi b/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi index 7308f7b6b22c..8bce64069138 100644 --- a/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi +++ b/arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi @@ -98,7 +98,7 @@ uart1: serial@12100 { compatible = "snps,dw-apb-uart"; - reg = <0x11000 0x100>; + reg = <0x12100 0x100>; reg-shift = <2>; interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; reg-io-width = <1>; |