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authorMiquel Raynal <miquel.raynal@bootlin.com>2019-10-04 16:27:29 +0200
committerGregory CLEMENT <gregory.clement@bootlin.com>2019-10-09 09:36:41 +0200
commit47cf40af64c35a69ef6a193c47768ad1bda29db2 (patch)
tree7433bf74769f7dcbae043e85d90a9456d3fa6f34 /arch/arm64/boot/dts/marvell/armada-70x0.dtsi
parent2bc26088ba37d4f2a4b8bd813ee757992522d082 (diff)
downloadlwn-47cf40af64c35a69ef6a193c47768ad1bda29db2.tar.gz
lwn-47cf40af64c35a69ef6a193c47768ad1bda29db2.zip
arm64: dts: marvell: Prepare the introduction of CP115
CP110 and CP115 are almost the same in terms of features and have a very limited set of differences. Let's create an armada-cp11x.dtsi file which will be used to instantiate both CP110 and CP115 nodes. The only changes between the two armada-cp11{0,x}.dtsi files are the following naming in macros: s/CP110/CP11X/. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Diffstat (limited to 'arch/arm64/boot/dts/marvell/armada-70x0.dtsi')
-rw-r--r--arch/arm64/boot/dts/marvell/armada-70x0.dtsi28
1 files changed, 14 insertions, 14 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-70x0.dtsi b/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
index e5c6d7c25819..4e78ccd207b7 100644
--- a/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
@@ -17,23 +17,23 @@
/*
* Instantiate the CP110
*/
-#define CP110_NAME cp0
-#define CP110_BASE f2000000
-#define CP110_PCIE_IO_BASE 0xf9000000
-#define CP110_PCIE_MEM_BASE 0xf6000000
-#define CP110_PCIE0_BASE f2600000
-#define CP110_PCIE1_BASE f2620000
-#define CP110_PCIE2_BASE f2640000
+#define CP11X_NAME cp0
+#define CP11X_BASE f2000000
+#define CP11X_PCIE_IO_BASE 0xf9000000
+#define CP11X_PCIE_MEM_BASE 0xf6000000
+#define CP11X_PCIE0_BASE f2600000
+#define CP11X_PCIE1_BASE f2620000
+#define CP11X_PCIE2_BASE f2640000
#include "armada-cp110.dtsi"
-#undef CP110_NAME
-#undef CP110_BASE
-#undef CP110_PCIE_IO_BASE
-#undef CP110_PCIE_MEM_BASE
-#undef CP110_PCIE0_BASE
-#undef CP110_PCIE1_BASE
-#undef CP110_PCIE2_BASE
+#undef CP11X_NAME
+#undef CP11X_BASE
+#undef CP11X_PCIE_IO_BASE
+#undef CP11X_PCIE_MEM_BASE
+#undef CP11X_PCIE0_BASE
+#undef CP11X_PCIE1_BASE
+#undef CP11X_PCIE2_BASE
&cp0_gpio1 {
status = "okay";