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author | Arnd Bergmann <arnd@arndb.de> | 2019-09-03 16:10:52 +0200 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2019-09-03 16:10:53 +0200 |
commit | e8e39a2026abc7f148e3b92bf0d5c9721c2c6bff (patch) | |
tree | 04df1d9dd2918ff85bf19adc76d4c8db6fb975cc /arch/arm64/boot/dts/freescale/imx8qxp.dtsi | |
parent | a0a4c25fba92d570f3256495328787ee30c3b044 (diff) | |
parent | 215701807e53a379e1c9b2e6401676779ef85ea0 (diff) | |
download | lwn-e8e39a2026abc7f148e3b92bf0d5c9721c2c6bff.tar.gz lwn-e8e39a2026abc7f148e3b92bf0d5c9721c2c6bff.zip |
Merge tag 'imx-dt64-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm64 device tree update for 5.4:
- New board support: i.MX8MQ Nitrogen8m, Hummingboard Pulse,
PICO-PI-IMX8M, i.MX8QXP AI_ML, and LS1046A FRWY board.
- Add gpio-ranges for GPIO devices on i.MX8MQ and i.MX8MM.
- Update OPP table according to latest data sheet and add opp-suspend
to OPP table for i.MX8MQ and i.MX8MM.
- Add IDEL states for i.MX8MM SoC.
- Correct I2C clock divider for Layerscape SoCs.
- Add series alias and LPUART baud clock for i.MX8QXP SoC.
- Add MIPI D-PHY device for i.MX8MQ and enable it on imx8mq-librem5
board.
- Enable USB1 and Type-C support for i.MX8MM EVK board.
- Add Thermal Monitor Unit support for LS1028A SoC.
- Misc small update and correction on Layerscape and i.MX8 support.
* tag 'imx-dt64-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (41 commits)
arm64: dts: imx8mq: Add mux controller to iomuxc_gpr
arm64: dts: fsl: add support for Hummingboard Pulse
arm64: dts: ls1088a: update gpio compatible
arm64: dts: imx: Add i.mx8mq nitrogen8m basic dts support
arm64: dts: ls1088a-qds: Add the spi-flash nodes under the DSPI controller
arm64: dts: ls1088a: Add the DSPI controller node
arm64: dts: imx8mm: Enable cpu-idle driver
arm64: dts: ls1028a: Add esdhc node in dts
arm64: dts: ls1028a: Add properties node for Display output pixel clock
arm64: dts: lx2160a: Fix incorrect I2C clock divider
arm64: dts: ls1028a: Fix incorrect I2C clock divider
arm64: dts: ls1012a: Fix incorrect I2C clock divider
arm64: dts: ls1088a: Fix incorrect I2C clock divider
arm64: dts: ls1028a: fix gpio nodes
arm64: dts: ls1028a: Add Thermal Monitor Unit node
arm64: dts: imx8mq-evk: Unbypass audio_pll1
arm64: dts: imx8mm: Add opp-suspend property to OPP table
arm64: dts: imx8mq: Add opp-suspend property to OPP table
arm64: dts: ls1088a: Revise gpio registers to little-endian
arm64: dts: add the console node for DPAA2 platforms
...
Link: https://lore.kernel.org/r/20190825153237.28829-6-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8qxp.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 23 |
1 files changed, 15 insertions, 8 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi index b6c408fb2b7f..1133b412182a 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi @@ -30,6 +30,9 @@ mmc2 = &usdhc3; mu1 = &lsio_mu1; serial0 = &adma_lpuart0; + serial1 = &adma_lpuart1; + serial2 = &adma_lpuart2; + serial3 = &adma_lpuart3; }; cpus { @@ -241,8 +244,9 @@ reg = <0x5a060000 0x1000>; interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&gic>; - clocks = <&adma_lpcg IMX_ADMA_LPCG_UART0_BAUD_CLK>; - clock-names = "ipg"; + clocks = <&adma_lpcg IMX_ADMA_LPCG_UART0_IPG_CLK>, + <&adma_lpcg IMX_ADMA_LPCG_UART0_BAUD_CLK>; + clock-names = "ipg", "baud"; power-domains = <&pd IMX_SC_R_UART_0>; status = "disabled"; }; @@ -252,8 +256,9 @@ reg = <0x5a070000 0x1000>; interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&gic>; - clocks = <&adma_lpcg IMX_ADMA_LPCG_UART1_BAUD_CLK>; - clock-names = "ipg"; + clocks = <&adma_lpcg IMX_ADMA_LPCG_UART1_IPG_CLK>, + <&adma_lpcg IMX_ADMA_LPCG_UART1_BAUD_CLK>; + clock-names = "ipg", "baud"; power-domains = <&pd IMX_SC_R_UART_1>; status = "disabled"; }; @@ -263,8 +268,9 @@ reg = <0x5a080000 0x1000>; interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&gic>; - clocks = <&adma_lpcg IMX_ADMA_LPCG_UART2_BAUD_CLK>; - clock-names = "ipg"; + clocks = <&adma_lpcg IMX_ADMA_LPCG_UART2_IPG_CLK>, + <&adma_lpcg IMX_ADMA_LPCG_UART2_BAUD_CLK>; + clock-names = "ipg", "baud"; power-domains = <&pd IMX_SC_R_UART_2>; status = "disabled"; }; @@ -274,8 +280,9 @@ reg = <0x5a090000 0x1000>; interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&gic>; - clocks = <&adma_lpcg IMX_ADMA_LPCG_UART3_BAUD_CLK>; - clock-names = "ipg"; + clocks = <&adma_lpcg IMX_ADMA_LPCG_UART3_IPG_CLK>, + <&adma_lpcg IMX_ADMA_LPCG_UART3_BAUD_CLK>; + clock-names = "ipg", "baud"; power-domains = <&pd IMX_SC_R_UART_3>; status = "disabled"; }; |