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author | Marek Vasut <marex@denx.de> | 2022-04-26 21:59:01 +0200 |
---|---|---|
committer | Shawn Guo <shawnguo@kernel.org> | 2022-05-05 11:47:43 +0800 |
commit | 13e4e43a1934d22e27a4553cb219133ef9583954 (patch) | |
tree | a81f106c1e1f6d77e1219998387ce8090e453c4b /arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts | |
parent | dab98061d71891a506c3ae2766fd23c07b65f6d3 (diff) | |
download | lwn-13e4e43a1934d22e27a4553cb219133ef9583954.tar.gz lwn-13e4e43a1934d22e27a4553cb219133ef9583954.zip |
arm64: dts: imx8mm: Add CPLD on MX8Menlo board
The CPLD on MX8Menlo board is used to operate custom hardware,
the CPLD content is compatible with previous M53Menlo CPLD,
add the bindings.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: devicetree@vger.kernel.org
To: linux-arm-kernel@lists.infradead.org
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts')
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts b/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts index c20db0c550da..92eaf4ef4563 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts @@ -71,7 +71,20 @@ &ecspi2 { pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_gpio1>; cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>, <&gpio3 4 GPIO_ACTIVE_LOW>; - status = "disabled"; + status = "okay"; + + spidev@0 { + compatible = "menlo,m53cpld"; + reg = <0>; + spi-max-frequency = <25000000>; + }; + + spidev@1 { + compatible = "menlo,m53cpld"; + reg = <1>; + spi-max-frequency = <25000000>; + }; + }; ðphy0 { |