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author | Dinh Nguyen <dinguyen@opensource.altera.com> | 2015-08-04 23:25:50 -0500 |
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committer | Dinh Nguyen <dinguyen@opensource.altera.com> | 2015-10-06 04:42:38 -0500 |
commit | 78cd6a9d8e154fe2ac5d2b912519e27545cfd13b (patch) | |
tree | 8304364fe682d778967d36d93017df80594154a6 /arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts | |
parent | 19c21388272a64c0cd5c4a6a24eca33507ee6d50 (diff) | |
download | lwn-78cd6a9d8e154fe2ac5d2b912519e27545cfd13b.tar.gz lwn-78cd6a9d8e154fe2ac5d2b912519e27545cfd13b.zip |
arm64: dts: Add base stratix 10 dtsi
Add the base DTS for Altera's SoCFPGA Stratix 10 platform.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
v4: Add a non-zero ranges property for /soc node
v3: change #address-cells and #size-cells to <2>
change the GIC address to 0xfffc1000
update the GIC virtual CPU reg length to 0x2000
v2: use interrupt-affinity for pmu node
Diffstat (limited to 'arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts')
-rw-r--r-- | arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts new file mode 100644 index 000000000000..41ea2dba2fce --- /dev/null +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts @@ -0,0 +1,39 @@ +/* + * Copyright Altera Corporation (C) 2015. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +/include/ "socfpga_stratix10.dtsi" + +/ { + model = "SoCFPGA Stratix 10 SoCDK"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory { + device_type = "memory"; + /* We expect the bootloader to fill in the reg */ + reg = <0 0 0 0>; + }; +}; + +&uart0 { + status = "okay"; +}; |