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author | Radha Mohan Chintakuntla <rchintakuntla@cavium.com> | 2014-03-07 08:49:25 +0000 |
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committer | Catalin Marinas <catalin.marinas@arm.com> | 2014-03-13 11:22:36 +0000 |
commit | 87366d8cf7b3f6dc34633938aa8766e5a390ce33 (patch) | |
tree | 9af5603c6cf5627207b0b78a44777bdfde6a1f87 /arch/arm64/Kconfig | |
parent | 71fdb6bf61bf0692f004f9daf5650392c0cfe300 (diff) | |
download | lwn-87366d8cf7b3f6dc34633938aa8766e5a390ce33.tar.gz lwn-87366d8cf7b3f6dc34633938aa8766e5a390ce33.zip |
arm64: Add boot time configuration of Intermediate Physical Address size
ARMv8 supports a range of physical address bit sizes. The PARange bits
from ID_AA64MMFR0_EL1 register are read during boot-time and the
intermediate physical address size bits are written in the translation
control registers (TCR_EL1 and VTCR_EL2).
There is no change in the VA bits and levels of translation.
Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
Reviewed-by: Will Deacon <Will.deacon@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/Kconfig')
0 files changed, 0 insertions, 0 deletions