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| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2009-05-25 20:58:00 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-05-28 19:39:27 +0100 |
| commit | bac4e960b5ce2453d862beaf20e59aa68af3b43a (patch) | |
| tree | 69ba3b450a769fa4a613a1f8c4e6454cdcfae5aa /arch/arm/lib | |
| parent | 290815710b51de23f9ed6799d3e0bb762d4f907c (diff) | |
| download | lwn-bac4e960b5ce2453d862beaf20e59aa68af3b43a.tar.gz lwn-bac4e960b5ce2453d862beaf20e59aa68af3b43a.zip | |
[ARM] barriers: improve xchg, bitops and atomic SMP barriers
Mathieu Desnoyers pointed out that the ARM barriers were lacking:
- cmpxchg, xchg and atomic add return need memory barriers on
architectures which can reorder the relative order in which memory
read/writes can be seen between CPUs, which seems to include recent
ARM architectures. Those barriers are currently missing on ARM.
- test_and_xxx_bit were missing SMP barriers.
So put these barriers in. Provide separate atomic_add/atomic_sub
operations which do not require barriers.
Reported-Reviewed-and-Acked-by: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/lib')
| -rw-r--r-- | arch/arm/lib/bitops.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/lib/bitops.h b/arch/arm/lib/bitops.h index 2e787d40d599..c7f2627385e7 100644 --- a/arch/arm/lib/bitops.h +++ b/arch/arm/lib/bitops.h @@ -18,12 +18,14 @@ mov r2, #1 add r1, r1, r0, lsr #3 @ Get byte offset mov r3, r2, lsl r3 @ create mask + smp_dmb 1: ldrexb r2, [r1] ands r0, r2, r3 @ save old value of bit \instr r2, r2, r3 @ toggle bit strexb ip, r2, [r1] cmp ip, #0 bne 1b + smp_dmb cmp r0, #0 movne r0, #1 2: mov pc, lr |