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| author | Mario Smarduch <m.smarduch@samsung.com> | 2015-01-15 15:58:56 -0800 |
|---|---|---|
| committer | Christoffer Dall <christoffer.dall@linaro.org> | 2015-01-16 14:40:14 +0100 |
| commit | c64735554c0aad2dc83c737ecf4c32075bed57a4 (patch) | |
| tree | 6ade125293fcfa52ce1142d9e74cc70ddc16c5c5 /arch/arm/include/asm/pgtable-3level.h | |
| parent | 72fc36b600f73e37557576af80c58836dcf389f9 (diff) | |
| download | lwn-c64735554c0aad2dc83c737ecf4c32075bed57a4.tar.gz lwn-c64735554c0aad2dc83c737ecf4c32075bed57a4.zip | |
KVM: arm: Add initial dirty page locking support
Add support for initial write protection of VM memslots. This patch
series assumes that huge PUDs will not be used in 2nd stage tables, which is
always valid on ARMv7
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Mario Smarduch <m.smarduch@samsung.com>
Diffstat (limited to 'arch/arm/include/asm/pgtable-3level.h')
| -rw-r--r-- | arch/arm/include/asm/pgtable-3level.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/pgtable-3level.h b/arch/arm/include/asm/pgtable-3level.h index a31ecdad4b59..ae1d30a1aaae 100644 --- a/arch/arm/include/asm/pgtable-3level.h +++ b/arch/arm/include/asm/pgtable-3level.h @@ -130,6 +130,7 @@ #define L_PTE_S2_RDONLY (_AT(pteval_t, 1) << 6) /* HAP[1] */ #define L_PTE_S2_RDWR (_AT(pteval_t, 3) << 6) /* HAP[2:1] */ +#define L_PMD_S2_RDONLY (_AT(pmdval_t, 1) << 6) /* HAP[1] */ #define L_PMD_S2_RDWR (_AT(pmdval_t, 3) << 6) /* HAP[2:1] */ /* |