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| author | Stephen Boyd <sboyd@kernel.org> | 2026-02-02 10:57:51 -0800 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2026-02-02 11:06:00 -0800 |
| commit | f08e7edbe2ab9134ce23b21c019867fff855ebfd (patch) | |
| tree | e1e956c7c131fbf25353fa858174ebf45df78ec1 /Documentation | |
| parent | 8f0b4cce4481fb22653697cced8d0d04027cb1e8 (diff) | |
| parent | ec8c1f35b5aa7aa63bd398add63a8633adad532c (diff) | |
| download | lwn-f08e7edbe2ab9134ce23b21c019867fff855ebfd.tar.gz lwn-f08e7edbe2ab9134ce23b21c019867fff855ebfd.zip | |
Merge tag 'clk-microchip-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into clk-microchip
Pull Microchip clk driver updates from Claudiu Beznea:
- clean up microchip/clk-core.c to:
-- fix a sparse warning related to multiple initializations of
pic32_sclk_ops.determine_rate()
-- correct the return values of roclk_get_parent() and sclk_get_parent()
-- drop an unused include header
- adjust the PolarFire driver Kconfig section as the driver is now used by
non-PolarFire devices
- update the documentation for the Microchip PIC64GX SoC clock controller
* tag 'clk-microchip-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
dt-bindings: clock: mpfs-clkcfg: Add pic64gx compatibility
dt-bindings: clock: mpfs-ccc: Add pic64gx compatibility
clk: microchip: drop POLARFIRE from ARCH_MICROCHIP_POLARFIRE
clk: microchip: core: remove unused include asm/traps.h
clk: microchip: core: correct return value on *_get_parent()
clk: microchip: core: remove duplicate determine_rate on pic32_sclk_ops
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml | 6 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml | 16 |
2 files changed, 20 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml b/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml index f1770360798f..9a6b50527c42 100644 --- a/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml +++ b/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml @@ -17,7 +17,11 @@ description: | properties: compatible: - const: microchip,mpfs-ccc + oneOf: + - items: + - const: microchip,pic64gx-ccc + - const: microchip,mpfs-ccc + - const: microchip,mpfs-ccc reg: items: diff --git a/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml b/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml index ee4f31596d97..a23703c281d1 100644 --- a/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml +++ b/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml @@ -19,7 +19,11 @@ description: | properties: compatible: - const: microchip,mpfs-clkcfg + oneOf: + - items: + - const: microchip,pic64gx-clkcfg + - const: microchip,mpfs-clkcfg + - const: microchip,mpfs-clkcfg reg: oneOf: @@ -69,6 +73,16 @@ required: - clocks - '#clock-cells' +if: + properties: + compatible: + contains: + const: microchip,pic64gx-clkcfg +then: + properties: + reg: + maxItems: 1 + additionalProperties: false examples: |