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| author | Anton Vorontsov <avorontsov@ru.mvista.com> | 2009-02-05 22:04:47 +0300 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2009-02-06 10:48:44 -0600 |
| commit | 34bcda616e5308a0633d5bfabcc090d7aa09b494 (patch) | |
| tree | 5625986b8f6806da4912af34fb2d3425e4d3705b /Documentation/powerpc | |
| parent | 960d82aa5ba971aa9da86a41881cb8dc8f96e397 (diff) | |
| download | lwn-34bcda616e5308a0633d5bfabcc090d7aa09b494.tar.gz lwn-34bcda616e5308a0633d5bfabcc090d7aa09b494.zip | |
powerpc: Document FSL eSDHC bindings
This patch documents OF bindings for the Freescale Enhanced Secure
Digital Host Controller.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'Documentation/powerpc')
| -rw-r--r-- | Documentation/powerpc/dts-bindings/fsl/esdhc.txt | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/Documentation/powerpc/dts-bindings/fsl/esdhc.txt b/Documentation/powerpc/dts-bindings/fsl/esdhc.txt new file mode 100644 index 000000000000..600846557763 --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/esdhc.txt @@ -0,0 +1,24 @@ +* Freescale Enhanced Secure Digital Host Controller (eSDHC) + +The Enhanced Secure Digital Host Controller provides an interface +for MMC, SD, and SDIO types of memory cards. + +Required properties: + - compatible : should be + "fsl,<chip>-esdhc", "fsl,mpc8379-esdhc" for MPC83xx processors. + "fsl,<chip>-esdhc", "fsl,mpc8536-esdhc" for MPC85xx processors. + - reg : should contain eSDHC registers location and length. + - interrupts : should contain eSDHC interrupt. + - interrupt-parent : interrupt source phandle. + - clock-frequency : specifies eSDHC base clock frequency. + +Example: + +sdhci@2e000 { + compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc"; + reg = <0x2e000 0x1000>; + interrupts = <42 0x8>; + interrupt-parent = <&ipic>; + /* Filled in by U-Boot */ + clock-frequency = <0>; +}; |