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author | Dave Jiang <dave.jiang@intel.com> | 2020-06-26 11:12:56 -0700 |
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committer | Vinod Koul <vkoul@kernel.org> | 2020-07-13 14:48:02 +0530 |
commit | 4548a6ad3d50c398aa12fa3ad45dd0611328f13b (patch) | |
tree | c3cc9d9f57620eb52ba2cf9f5b0a9618b46ba457 /Documentation/driver-api/dmaengine | |
parent | 0d5c10b4c84d6ae6255129e5f16a0d2119c74334 (diff) | |
download | lwn-4548a6ad3d50c398aa12fa3ad45dd0611328f13b.tar.gz lwn-4548a6ad3d50c398aa12fa3ad45dd0611328f13b.zip |
dmaengine: idxd: move idxd interrupt handling to mask instead of ignore
Switch driver to use MSIX mask and unmask instead of the ignore bit.
When ignore bit is cleared, we must issue an MMIO read to ensure writes
have all arrived and check and process any additional completions. The
ignore bit does not queue up any pending MSIX interrupts. The mask bit
however does. Use API call from interrupt subsystem to mask MSIX
interrupt since the hardware does not have convenient mask bit register.
Suggested-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/159319517621.70410.11816465052708900506.stgit@djiang5-desk3.ch.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'Documentation/driver-api/dmaengine')
0 files changed, 0 insertions, 0 deletions