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authorSrinivas Kandagatla <srinivas.kandagatla@linaro.org>2021-06-24 10:21:53 +0100
committerMark Brown <broonie@kernel.org>2021-06-24 19:29:53 +0100
commit6a7f5bd6185e1c86256d5e52c3bb7a4d390d6e19 (patch)
tree314eb98e36486ed4010771a646806d26d723a6a6
parent8cc802bd75fbf840635e7d4d48050bbcab4d938d (diff)
downloadlwn-6a7f5bd6185e1c86256d5e52c3bb7a4d390d6e19.tar.gz
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ASoC: qcom: lpass-cpu: mark IRQ_CLEAR register as volatile and readable
Currently IRQ_CLEAR register is marked as write-only, however using regmap_update_bits on this register will have some side effects. so mark IRQ_CLEAR register appropriately as readable and volatile. Fixes: da0363f7bfd3 ("ASoC: qcom: Fix for DMA interrupt clear reg overwriting") Reported-by: Marek Szyprowski <m.szyprowski@samsung.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Tested-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20210624092153.5771-1-srinivas.kandagatla@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--sound/soc/qcom/lpass-cpu.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/sound/soc/qcom/lpass-cpu.c b/sound/soc/qcom/lpass-cpu.c
index 4faae44b5118..3bd9eb3cc688 100644
--- a/sound/soc/qcom/lpass-cpu.c
+++ b/sound/soc/qcom/lpass-cpu.c
@@ -525,6 +525,8 @@ static bool lpass_cpu_regmap_readable(struct device *dev, unsigned int reg)
return true;
for (i = 0; i < v->irq_ports; ++i) {
+ if (reg == LPAIF_IRQCLEAR_REG(v, i))
+ return true;
if (reg == LPAIF_IRQEN_REG(v, i))
return true;
if (reg == LPAIF_IRQSTAT_REG(v, i))
@@ -566,9 +568,12 @@ static bool lpass_cpu_regmap_volatile(struct device *dev, unsigned int reg)
struct lpass_variant *v = drvdata->variant;
int i;
- for (i = 0; i < v->irq_ports; ++i)
+ for (i = 0; i < v->irq_ports; ++i) {
+ if (reg == LPAIF_IRQCLEAR_REG(v, i))
+ return true;
if (reg == LPAIF_IRQSTAT_REG(v, i))
return true;
+ }
for (i = 0; i < v->rdma_channels; ++i)
if (reg == LPAIF_RDMACURR_REG(v, i))