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| author | Michal Simek <michal.simek@xilinx.com> | 2021-08-06 12:14:23 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2021-09-13 08:55:56 +0200 |
| commit | 35a7430dad4dd83fe295917b8232595f437bb208 (patch) | |
| tree | 6888ebfb6a600896afcb76133b500bfb338abbc9 | |
| parent | b61c4ff95197e936837b271871929e7233f5bdcd (diff) | |
| download | lwn-35a7430dad4dd83fe295917b8232595f437bb208.tar.gz lwn-35a7430dad4dd83fe295917b8232595f437bb208.zip | |
arm64: zynqmp: Wire psgtr for zc1751-xm013
Add psgtr description for SATA and USB.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/8c78625f08c16385a4798e0a62d20df7491ac00e.1628244860.git.michal.simek@xilinx.com
| -rw-r--r-- | arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts index 4394ec3b6a23..381cc682cef9 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm017-dc3.dts @@ -11,6 +11,7 @@ #include "zynqmp.dtsi" #include "zynqmp-clk-ccf.dtsi" +#include <dt-bindings/phy/phy.h> / { model = "ZynqMP zc1751-xm017-dc3 RevA"; @@ -37,6 +38,18 @@ device_type = "memory"; reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; }; + + clock_si5338_2: clk26 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + }; + + clock_si5338_3: clk125 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + }; }; &fpd_dma_chan1 { @@ -116,6 +129,13 @@ num-cs = <2>; }; +&psgtr { + status = "okay"; + /* usb3, sata */ + clocks = <&clock_si5338_2>, <&clock_si5338_3>; + clock-names = "ref2", "ref3"; +}; + &rtc { status = "okay"; }; @@ -131,6 +151,8 @@ ceva,p1-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>; ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>; + phy-names = "sata-phy"; + phys = <&psgtr 2 PHY_TYPE_SATA 0 3>; }; &sdhci1 { /* emmc with some settings */ @@ -149,6 +171,8 @@ &usb0 { status = "okay"; + phy-names = "usb3-phy"; + phys = <&psgtr 0 PHY_TYPE_USB3 0 2>; }; &dwc3_0 { @@ -161,6 +185,8 @@ /* ULPI SMSC USB3320 */ &usb1 { status = "okay"; + phy-names = "usb3-phy"; + phys = <&psgtr 3 PHY_TYPE_USB3 1 2>; }; &dwc3_1 { |