summaryrefslogblamecommitdiff
path: root/include/video/sh_mipi_dsi.h
blob: a01f197e6ac1560d1200b0f8d4e1b843b1891fd2 (plain) (tree) 
9fd04fe34af3 ^



























38f3a8794236 ^

32ba95c69f33 ^

f7b0af68bc9f ^

d07a9d2a5e82 ^

f832906a56bc ^




a2e6297153f8 ^




f832906a56bc ^





38f3a8794236 ^

9fd04fe34af3 ^


50b1a7447749 ^

26c3d7ac219e ^

38f3a8794236 ^


8f9c60f2e297 ^

38f3a8794236 ^

5e47431aabf7 ^



9fd04fe34af3 ^



1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27

28

29

30

31

32
33
34
35

36
37
38
39

40
41
42
43
44

45

46
47

48

49

50
51

52

53

54
55
56

57
58
59



























                                                                       
                                        
                                        
                                        
                                        



                                        



                                         




                                                             
 

                                                    
                                                
                                             

                                               
                                                                        
                                                     


                                                              


      
/*
 * Public SH-mobile MIPI DSI header
 *
 * Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#ifndef VIDEO_SH_MIPI_DSI_H
#define VIDEO_SH_MIPI_DSI_H

enum sh_mipi_dsi_data_fmt {
	MIPI_RGB888,
	MIPI_RGB565,
	MIPI_RGB666_LP,
	MIPI_RGB666,
	MIPI_BGR888,
	MIPI_BGR565,
	MIPI_BGR666_LP,
	MIPI_BGR666,
	MIPI_YUYV,
	MIPI_UYVY,
	MIPI_YUV420_L,
	MIPI_YUV420,
};

#define SH_MIPI_DSI_HSABM	(1 << 0)
#define SH_MIPI_DSI_HBPBM	(1 << 1)
#define SH_MIPI_DSI_HFPBM	(1 << 2)
#define SH_MIPI_DSI_BL2E	(1 << 3)
#define SH_MIPI_DSI_VSEE	(1 << 4)
#define SH_MIPI_DSI_HSEE	(1 << 5)
#define SH_MIPI_DSI_HSAE	(1 << 6)

#define SH_MIPI_DSI_HSbyteCLK	(1 << 24)
#define SH_MIPI_DSI_HS6divCLK	(1 << 25)
#define SH_MIPI_DSI_HS4divCLK	(1 << 26)

#define SH_MIPI_DSI_SYNC_PULSES_MODE	(SH_MIPI_DSI_VSEE | \
					 SH_MIPI_DSI_HSEE | \
					 SH_MIPI_DSI_HSAE)
#define SH_MIPI_DSI_SYNC_EVENTS_MODE	(0)
#define SH_MIPI_DSI_SYNC_BURST_MODE	(SH_MIPI_DSI_BL2E)

struct sh_mipi_dsi_info {
	enum sh_mipi_dsi_data_fmt	data_format;
	int				channel;
	int				lane;
	unsigned long			flags;
	u32				clksrc;
	u32				phyctrl; /* for extra setting */
	unsigned int			vsynw_offset;
	int	(*set_dot_clock)(struct platform_device *pdev,
				 void __iomem *base,
				 int enable);
};

#endif