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git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
Pull LoongArch updates from Huacai Chen:
- Add LoongArch-specific ACPI initialization
- Set NX compat flag in PE/COFF efi header
- Use pa_to_nid()/nid_to_addrbase() rather than hard-code
- Detect and expose LAMCAS/DIV32 feature existence
- Fix and improve perf hardware breakpoints
- Fix and improve BPF JIT (trampoline and 32-bit operations)
- Add arch_crash_save_vmcoreinfo() support
- Some bug fixes and other small changes
* tag 'loongarch-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson: (24 commits)
soc: loongson: loongson2_guts: Use of_root instead of own reference
soc: loongson: loongson2_pm: Fix build warnings for 32BIT
LoongArch: dts: loongson-2k0500: Drop unsupported bus_id in DWMAC
LoongArch: BPF: Optimize 32-bit operations using native instructions
LoongArch: BPF: Clean up and decouple is32 parameter from move_imm()
LoongArch: BPF: Fix stack arguments for indirect trampolines
LoongArch: Add arch_crash_save_vmcoreinfo() support
LoongArch: Fix one-shot limitation for perf hardware breakpoints
LoongArch: Fix perf hardware breakpoint failure via installation
LoongArch: Only send SIGTRAP signal if necessary in do_watch()
LoongArch: Fix architectural naming typo for CSR_FWPS_SKIP
LoongArch: Fix bitmask corruption in update_bp_registers()
LoongArch: Remove redundant call in update_bp_registers()
LoongArch: Remove arch-specific __smp_mb__{before,after}_atomic()
LoongArch: Detect and expose DIV32 feature existence
LoongArch: Detect and expose LAMCAS feature existence
LoongArch: Use pa_to_nid()/nid_to_addrbase() rather than hard-code
LoongArch: Don't init & online empty nodes
LoongArch: Call cpu_final_simd() with pure_initcall()
LoongArch: Use assign_bit() API where applicable
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git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux
Pull remoteproc updates from Bjorn Andersson:
- Add Qualcomm QMI Thermal Mitigation Device support for PAS-managed
remote processors, with cooling device bindings and configurations
for Hamoa, Kodiak, Lemans, Talos, Monaco, and Shikra CDSP and modem
subsystems as applicable.
- Add per-power-domain proxy performance states for Hawi CDSP and
update Hawi, Maili, and SDX75 PAS compatible bindings and the SDX75
device tree. Correct the Qualcomm ADSP startup timeout.
- Fetch auto-boot firmware only once and synchronize boot work with
device removal. Bound ELF section header accesses, improve trace
diagnostics, and update coredump configuration documentation.
- Set 48-bit DMA masks for TI K3 DSP and R5 remote processors, correct
mailbox message types, and enable compile testing for more TI
drivers. Fix i.MX address range boundary checks and DSP runtime PM
ordering, and simplify mailbox notification handling.
- Harden Xilinx mailbox setup and teardown and avoid sending
notifications when the transmit queue is full. Propagate STM32
optional IRQ lookup errors and correct the MediaTek MT8188 SCP
register binding.
* tag 'rproc-v7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux: (33 commits)
remoteproc: qcom_q6v5_pas: Add QMI TMD cooling support for Shikra
remoteproc: virtio: Remove stray white space
remoteproc: virtio: Replace kmemdup with kmemdup_array
remoteproc: virtio: Add vdev_to_rsc() helper
remoteproc: core: Fetch the auto-boot firmware only once
remoteproc: xlnx: fix typecast warnings
remoteproc: qcom_q6v5_pas: enable QMI TMD cooling support
remoteproc: qcom: pas: add support for TMD thermal cooling devices
soc: qcom: Add QMI TMD support for remote thermal mitigation
dt-bindings: remoteproc: qcom,pas: add #cooling-cells property
remoteproc: qcom_q6v5_pas: add per-PD proxy performance states for Hawi CDSP
dt-bindings: remoteproc: qcom,sm8550-pas: make qcom,hawi-cdsp-pas standalone
arm64: dts: qcom: sdx75: Use SM8650 MPSS as fallback compatible
dt-bindings: remoteproc: qcom,sm8550-pas: Make SDX75 MPSS fallback to SM8650
dt-bindings: remoteproc: qcom,sm8550-pas: Add Hawi and Maili MPSS as SM8650 fallback
dt-bindings: remoteproc: Fix MT8188 SCP regs
remoteproc: Use %p for pointer formatting
remoteproc: Add compile testing for additional TI drivers
remoteproc: k3-dsp: Fix usage of omap_mbox_message and mbox_msg_t
remoteproc: k3: Include what we need and only what we need
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There is already a global of_root reference. Use that instead of getting
one on our own. We don't need to care about the reference count either
this way.
Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
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Since loongson_sysconf.suspend_addr is unsigned long, use "unsigned
long" instead of "u64" for casting, so as to avoid build warnings for
32BIT:
drivers/soc/loongson/loongson2_pm.c: In function 'loongson2_pm_probe':
>> drivers/soc/loongson/loongson2_pm.c:178:49: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
178 | loongson_sysconf.suspend_addr = (u64)phys_to_virt(suspend_addr);
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Cc: stable@vger.kernel.org
Fixes: 3d9aba6618d1 ("LoongArch: Adjust build infrastructure for 32BIT/64BIT")
Closes: https://lore.kernel.org/oe-kbuild-all/202610190549.WM2PO3vO-lkp@intel.com/
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
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git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC driver updates from Arnd Bergmann:
"There are lots of minor updates for driver subsystems managed through
the soc tree (turris-omnia platform, cache driver, tee drivers,
arm-cci, bus, memory) as well as soc vendor specific drivers
(starfive, xilinx, microchip, nxp, amlogic, imx, renesas, samsung, ti,
nvidia).
The more notable changes are:
- Larger updates for Qualcomm SoCs including support for SM8950
(Maili) SM8975 (Hawi), Glymur, Shikra, and IPQ5424
- Added SoC support for Exynos5515, Tegra264, Tegra410, R8A774A3, and
MT8167 in existing drivers
- Arm SCMI firmware driver support for ACPI PCC transport and module
autoloading of protocol specific drivers
- Apple crash log support for CrgA embedded controller"
* tag 'soc-drivers-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (176 commits)
platform: cznic: turris-omnia-mcu: stop button emulation producers
cache: Make cpu_cache_invalidate_memregion() error out if there are no handlers
soc: mpfs: use kref cleanup on probe failure
arm64: enable HAVE_SHARED_GPIOS for all ARM64 platforms
bus: arm-cci: Drop cci-control-port node reference in __cci_ace_get_port()
bus: arm-cci: Drop CPU node reference in cci_ace_init_ports()
soc: fsl: dpio: Free the IRQ before releasing the I/O object
soc: fsl: dpio: Fix cleanup on IRQ registration failure
bus: fsl-mc: Annotate fsl_mc_io.portal_virt_addr with __counted_by_ptr
bus: fsl-mc: drop the fwnode links of the dpmacs nodes
soc: fsl: cpm1: tsa: Fix clock leak in tsa_of_parse_tdms()
soc: qcom: geni-se: Drop unused icc_ddr parameter from geni_icc_get()
firmware: qcom: scm: Allow QSEECOM on ThinkPad T14s Gen 7
dt-bindings: mailbox: qcom: Document Maili CPUCP mailbox controller
dt-bindings: spmi: glymur-spmi-pmic-arb: Add compatible for Qualcomm Maili SoC
soc: qcom: pmic_pdcharger_ulog: prevent work requeue during remove
ASoC: dt-bindings: qcom,apr: Add modem_apps GLINK channel for shikra
firmware: qcom: tzmem: disable SHM bridge for SM7125 platform
soc: qcom: ubwc: Add Kalambo UBWC config
firmware: qcom: scm: Allow QSEECOM on Kalambo CRD
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Pull SoC devicetree updates from Arnd Bergmann:
"This is a rather large update of over 1000 non-merge commits touching
devicetree files and bindings.
A few notable SoC were added this time:
- Apple M4 and A18 Pro are used in laptops, these follow the M3 model
added in 7.2.
- Google Laguna (aka Tensor G5) is used last year's Pixel phone
generation. Unlike the earlier Tensor chips, this is not based on
Samsung's Exynos family design but starts a new chip family.
- Qualcomm's Hawi and Nord SoCs are two powerful chips using the
custom Oryon cores. Product names and applications are so far not
known, which means that Qualcomm is doing something right by
upstreaming kernel support early.
The ST stm32mp23xc/stm32mp25xc SoC support was previously removed
because there were no users upstream, but they are back now that
boards have shown up. Renesas RZ/G2M v3.0 (R8A774A3) is just a minor
variation of the already supported SoC.
In total, there are 81 new dts files for individual boards, and they
are all over the place. Only one riscv based machine is added, the
Milk-V Meles SBC using the T-Head th1520 chip. For 32-bit Arm, we have
13 new boards. About half are industrial embedded boards using NXP
i.MX6/7 chips, the rest are older products: two Amazon tablets, two
Motorola phones and two SoM boards.
Everything else is 64-bit Arm:
- many industrial embedded boards using NXP layerscape, NXP i.MX8/9,
Qualcomm Hamoa, ST stm32mp2, Rockchip rk35xx, and Renesas RZ/G2
SoCs
- Laptops and tablets using Apple M4, Qualcomm Snapdragon X2,
Snapdragon X1 Elite and Allwinner A133 chips
- Valve Steam Frame VR headset using Snapdragon 8 Gen 3
- Seven handheld game consoles using Qualcomm Dragonwing qcs8550
- Mobile phones using Google Tensor G5, Samsung Exynos 850, and
various Qualcomm Snapdragon chips
Aside from the new stuff, there is still a lot going on for existing
socs and boards, including GPU hardware support on MediaTek MT8173
based laptops. Most patches actually add features this time, as the
compile-time diagnostic changes are slowing down"
* tag 'soc-dt-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (1022 commits)
arm64: dts: rockchip: Add Radxa E54C
dt-bindings: arm: rockchip: Add Radxa E54C
arm64: dts: rockchip: remove FRL GPIO for 100ASK DshanPi A1
arm64: dts: rockchip: fix M.2 E-key reset pinctrl on rk3588 rock-5-itx
arm64: dts: rockchip: add pcie30phy data-lanes on rk3588 coolpi-cm5-evb
arm64: dts: rockchip: Add the fan tachometers to Kobol Helios64
arm64: dts: rockchip: enable NPU on Radxa E52C
arm64: dts: rockchip: fix adc button voltage on Radxa E52C
riscv: dts: sophgo: sg2002-milkv-duo256m: drop reserved memory node
riscv: dts: sophgo: cv1800b-milkv-duo: drop reserved memory node
arm64: dts: nuvoton: npcm845-evb: Add peripheral nodes
arm64: dts: nuvoton: npcm845-evb: Fix DTS coding style
arm64: dts: nuvoton: npcm845: Add peripheral nodes
arm64: dts: nuvoton: npcm845: Split APB address ranges
riscv: dts: sophgo: cv180x: Fix internal ephy node name
riscv: dts: sophgo: add Milk-V Duo 256M ethernet support overlay
riscv: dts: sophgo: Limit SG2042 SPI NOR to 12.5 MHz
riscv: dts: sophgo: Enable SPI NOR on SRD3-10
riscv: dts: spacemit: set ETH MAC from eeprom for OrangePi
arm64: dts: allwinner: sun50i-h616: Add video engine
...
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq chip driver updates from Thomas Gleixner:
"Updates for interrupt chip drivers:
- Remove the futile attempts to cleanup resources when the probing of
the main interrupt chip fails for SiFIVE/PLIC devices. If that
probe fails the system will stall immediately afterwards in the
boot process without reaching a state where the error could be
diagnosed. The lack of resource cleanup led to a frenzy of AI
detected/assisted "fixes" which just make the code pretend to be
correct for no value.
Remove the existing half baked cleanup and immediately panic the
machine when the probe fails. That's far more useful than letting
it proceed and stall out a millisecond later with no information
about the root cause.
- A series of fixes for the ARM GIC-V3 driver addressing a potential
double free, a bitmask overrun on 32-bit ARM and a OF node leak.
- Automatically set the IRQ_DOMAIN_FLAG_DESTROY_GC when a interrupt
domain is created that also allocates the generic interrupt chip
during domain creation. That removes the requirement for manually
setting the flag in the domain creation info structure when it
contains a valid entry for allocating the generic interrupt chip.
Remove the therefore redundant setters of
IRQ_DOMAIN_FLAG_DESTROY_GC in the existing drivers.
- Add support for Annapurna Labs FIC version 2 and 3 and implement
affinity control for the demultiplexed interrupts by utilizing the
recently merged interrupt redirection infrastructure.
- Convert the ACPI device ID structures to named initializers
- Consolidate the IPI related constants for RISC-V interrupt
controllers
- Add support for Qualcomm Purwa SoC interrupt chip and consolidate
the workaround for the previous version in Hamoa SoCs.
- The usual small fixes and improvements all over the place"
* tag 'irq-drivers-2026-10-20' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (61 commits)
irqchip/al-fic: Support per-child affinity via interrupt redirection
irqchip/al-fic: Add support for FIC v3
irqchip/al-fic: Support error and fatal outputs and FIC v2
dt-bindings: interrupt-controller: amazon,al-fic: Add mask selection
irqchip/al-fic: Switch to shared parent interrupt
irqchip/al-fic: Keep the device_node instead of a cached name string
irqchip/al-fic: Use %pOF and raise init log level
irqchip/al-fic: Use %pe to print init error
irqchip/al-fic: Fix coding style issues
irqchip: Use named initializers for acpi_device_id
irqchip/gic-v5: Fix standalone IRSes OF probe
dt-bindings: interrupt-controller: gicv5: Relax IRS properties constraints
irqchip/renesas-rzv2h: Preserve TIEN state in rzv2h_tint_set_type()
irqchip/loongson-eiointc: Use pa_to_nid() rather than hard-code
irqchip/riscv-imsic: Expose the fwnode via the global config
irqchip/meson-gpio: Allow the GPIO interrupts to wake the system
irqchip/gic-v3: Ensure change to DS is visible
irqchip/mips-gic: Transfer interrupt mask state across clusters
irqchip/mips-gic: Fix recursive acquisition of gic_lock in gic_set_affinity()
irqchip/mips-gic: Fix unbalanced cm_core_lock in for_each_online_cpu_gic()
...
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git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 updates from Catalin Marinas:
"Here are the arm64 updates for 7.4.
The more interesting bits are the removal of big-endian kernel support
(already marked BROKEN for some time), preemptible this_cpu_*()
operations and MPAM support for the firmware-backed (Fb) interface.
CCA (Arm's confidential compute) is slowly trickling in with host RMI
(Realm Management Interface) support and some refactoring, including a
dedicated SMCCC bus to advertise firmware services. There are also the
usual PMU updates for new hardware and a few fixes/cleanups.
Core features:
- Remove big-endian kernel support: CONFIG_CPU_BIG_ENDIAN has
depended on BROKEN for a while, so drop the remaining code (BE
hypervisor object, BPF JIT, assembly/crypto/library routines,
endianness helper macros, selftests) and force a little-endian
build
- Add preemptible this_cpu_*() operations (read/write, RMW, xchg,
cmpxchg and cmpxchg128) that no longer need to disable preemption
around the per-CPU address generation and access
- Preparation patches for implementing CONFIG_HOTPLUG_PARALLEL on
arm64
Memory management:
- Treat faults taken by EFI runtime firmware as kernel faults
- Clear PTE_WRITE for EFI_MEMORY_RO mappings (with hardware dirty
state management enabled, this is not truly read-only)
- Raise the default ARCH_MMAP_RND_BITS for 48-bit and 52-bit VA
configurations (28/26/24 bits for 4K/16K/64K pages)
- Implement clear_page[s]() using memset()
- Enable BBML2 no-abort (a.k.a. BBML3) for the NVIDIA Rigel CPU
Perf and PMU:
- Support for HiSilicon's ITS PMU
- Add support for some new events: INST_SIMD_ALU_VEC for Apple PMUs
and a cycle counter for the latest version of HiSilicon's MN PMU
hardware
- A bunch of fixes to the CXL PMU driver to address pre-existing
issues from Sashiko
- Fix generation of PERF_RECORD_ITRACE_START records for SPE and ETM
drivers
- Reduce excessive stack consumption in the Marvell DDR PMU driver
- Minor driver updates and cleanups all over
Arm Confidential Compute Architecture (CCA):
- Add an Arm SMCCC bus for firmware services discovered through SMCCC
and move the TRNG and CCA guest (TSM provider) drivers onto it,
removing the dummy CCA platform device and adding a sysfs ABI for
Realm guests
- Move the Realm Service Interface (RSI) code out of arch/arm64/ into
drivers/firmware/arm_rmm/
- Add the host side of the Realm Management Interface (RMI): detect,
configure and activate the RMM, add SRO support and wrappers for
the Realm RMI commands
- Block hibernation (new arch hook in the PM core) and kexec while
the RMM is active. To be revisited in the future with proper
support for deactivation
- Handle Granule Protection Faults (GPFs) taken by the host, caused
by accesses to memory delegated to the RMM. In a future patch, the
exception table lookup will be limited to is_kdump_kernel() cases
MPAM (Memory Partitioning And Monitoring):
- Add support for the MPAM firmware-backed (Fb) interface, allowing
MSC accesses to be mediated by firmware
- Fix a list of theoretical issues with the driver (MSC access error
propagation, MBWU monitor save/restore and locking, resctrl class
handling, error interrupt restore, maximum number of PARTIDs)
- Add the mailing list and a missing file to the MAINTAINERS entry
- Document when to set arm64.nompam
Errata and CPU features:
- Add the NXP i.MX8QM/8QP workaround for the Cortex-A53 cache
coherency issue (ERR050104), using a new ARM64_CPUCAP_SOC_ERRATUM
capability type for SoC-level errata
Miscellaneous:
- Mask debug exceptions (DAIF) around the hardware breakpoint
register manipulations when called from generic kernel code
- Don't zero the SVE state buffer when the SVE state is live
- Return -EPERM instead of -EBUSY from the GCS prctl() locking
failures (matching x86), with the selftest updated. Slight ABI
change but no software deployment yet
- kselftest: fix unsound MTE fault skipping by introducing MTE-safe
memory accessors, avoid copying each signal test binary more than
once
- Update sysreg definitions (fix three enum values and two field
names, mark architecturally dropped fields as RES0) and remove the
TME transaction state check from the BRBE driver
- Fix the description of ARM64_HAS_LPA2 and remove a redundant
ID_AA64MMFR0 define"
* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (144 commits)
arm64: cpufeature: Enable BBML2 for NVIDIA Rigel
arm64: cputype: Add NVIDIA Rigel definitions
arm64: raise default ARCH_MMAP_RND_BITS for 48-bit and 52-bit VA
arm64/debug: mask debug exceptions when called from common code
kselftest/arm64: signal: copy each test binary only once
kselftest/arm64: Check for -EPERM not -EBUSY in the locking test
arm64: gcs: Return -EPERM not -EBUSY for prctl() locking failures
perf: arm_brbe: Remove the check for TME transaction states
arm64: sysreg: Mark fields the architecture dropped as RES0
arm64: sysreg: Fix the names of two misspelt fields
arm64: sysreg: Fix three incorrect enum values
arm64: smp: Defer RCU registration during secondary CPU bringup
arm64: smp: Don't bother printing the I-cache policy for each CPU
arm64: smp: Defer update of secondary CPU capabilities
arm64: smp: Tidy up cpuinfo init and cpufeature updates
arm64: smp: Tidy up smp_prepare_cpus()
arm64: cpufeature: Store every ID register with its overrides applied
arm64: cpufeature: Read MPAMIDR_EL1 in __cpuinfo_store_cpu()
arm64: cpufeature: Add read_cpuid_with_overrides()
arm64: cpufeature: Check arm64_ftr_regs[] before the first store
...
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https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers
RISC-V misc. soc drivers for v7.4
StarFive:
Syscon bindings and a socinfo driver for the JHB100. There ended up
being several clock bindings here also because the clock tree needed the
whole lot due to headers and I envisaged this being part of a three-way
shared tag between my soc driver branch, dts branch and the clock tree.
Due to timing, the dts branch didn't get this content, leading to the
slightly odd branch here.
Microchip:
A bugfix for teardown code in the mpfs system controller driver.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
* tag 'riscv-soc-drivers-for-v7.4' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
soc: mpfs: use kref cleanup on probe failure
soc: starfive: Add socinfo driver for JHB100 SoC
dt-bindings: soc: starfive: Add StarFive JHB100 syscon modules
dt-bindings: clock: Add StarFive JHB100 Peripheral-3 clock and reset generator
dt-bindings: clock: Add StarFive JHB100 Peripheral-2 clock and reset generator
dt-bindings: clock: Add StarFive JHB100 Peripheral-1 clock and reset generator
dt-bindings: clock: Add StarFive JHB100 Peripheral-0 clock and reset generator
dt-bindings: clock: Add StarFive JHB100 System-2 clock and reset generator
dt-bindings: clock: Add StarFive JHB100 System-1 clock and reset generator
dt-bindings: clock: Add StarFive JHB100 System-0 clock and reset generator
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/chleroy/linux into soc/drivers
FSL SOC Changes for 7.4
Freescale QUICC Engine:
- Fix sparse warnings in GPIO
- Drop GPIOD_FLAGS_BIT_NONEXCLUSIVE
Freescale CPM1 Timeslot Assigner:
- Fix clock leak in tsa_of_parse_tdms()
Data Path I/O:
- Free the IRQ before releasing the I/O object
- Fix cleanup on IRQ registration failure
Freescale Management Complex:
- Annotate fsl_mc_io.portal_virt_addr with __counted_by_ptr
- Drop the fwnode links of the dpmacs nodes
- Register the object drivers after misc_class exists
- Set dma_mask for the DPRC devices
- Fix repeated word 'for' in comment
* tag 'soc_fsl-7.4-1' of https://git.kernel.org/pub/scm/linux/kernel/git/chleroy/linux:
soc: fsl: dpio: Free the IRQ before releasing the I/O object
soc: fsl: dpio: Fix cleanup on IRQ registration failure
bus: fsl-mc: Annotate fsl_mc_io.portal_virt_addr with __counted_by_ptr
bus: fsl-mc: drop the fwnode links of the dpmacs nodes
soc: fsl: cpm1: tsa: Fix clock leak in tsa_of_parse_tdms()
soc: fsl: qe: drop GPIOD_FLAGS_BIT_NONEXCLUSIVE
bus: fsl-mc: register the object drivers after misc_class exists
bus: fsl-mc: set dma_mask for the DPRC devices
bus: fsl-mc: fix repeated word 'for' in comment
soc: fsl: qe: Fix sparse warnings in GPIO
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/drivers
Microchip AT91 SoC updates for v7.4
This update includes:
- replace __ASSEMBLY__ with __ASSEMBLER__ to avoid confusion
- use of_machine_device_match() instead of open-coding it
# -----BEGIN PGP SIGNATURE-----
#
# iHUEABYKAB0WIQTsZ8eserC1pmhwqDmejrg/N2X7/QUCasf/xwAKCRCejrg/N2X7
# /b8EAP9CXM18J/eV6Evhyg9FN0z0ol1+PNNPCc7WvzNytfELKQD/Y/qaqWmRKIoh
# 0ART3i3D7843g9xrPci5djL0eGK17Aw=
# =Cpyo
# -----END PGP SIGNATURE-----
# gpg: Signature made Do 08 Okt 2026 22:40:39 CEST
# gpg: using EDDSA key EC67C7AC7AB0B5A66870A8399E8EB83F3765FBFD
# gpg: Can't check signature: No public key
* tag 'at91-soc-7.4' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
soc: atmel: Convert to of_machine_device_match()
ARM: at91: Replace __ASSEMBLY__ with __ASSEMBLER__
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers
soc/tegra: Changes for v7.4-rc1
Adds various bits of core Tegra SoC support for Tegra410, Tegra264 and
Tegra210-B01. Tegra234 can now be woken up via PCIe. Some references
leak and other fixes round this off.
* tag 'tegra-for-7.4-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: flowctrl: Release OF node reference on error
soc/tegra: pmc: Make sure clk_init_data is fully initialized
soc/tegra: fuse: speedo-tegra210: Support revision B01
soc/tegra: fuse: Support revision B01
soc/tegra: pmc: Add Tegra210B01 support
soc/tegra: cbb: Fix loggger -> logger typo
soc/tegra: pmc: Add PCIe wake event for Tegra234
soc/tegra: fuse: Add Tegra264 support
soc/tegra: pmc: Add PMC support for Tegra410
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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After kref_init(), the device_get_match_data() failure path frees the
mailbox channel and sys_controller directly, bypassing the matching
kref_put() for the initial reference.
Use mpfs_sys_controller_put() on this path so that the initial
reference established by kref_init() is released through the existing
kref release callback.
Rename the error label to reflect that cleanup is now performed
through the kref helper.
This issue was found by manual code inspection.
Fixes: 75ef23397558 ("soc: microchip: mpfs-sys-controller: fix resource leak on probe error")
Signed-off-by: Guangshuo Li <lgs201920130244@gmail.com>
Signed-off-by: Conor Dooley <mail@conchuod.ie>
|
|
https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/drivers
Amlogic drivers for v7.4:
- Clock measure bindings reorg
- Clock measure support for Amlogic a4/a5/s7/s7d/s6/a9
- Clock mesure memory optimization
* tag 'amlogic-drivers-for-v7.4' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
soc: amlogic: clk-measure: Optimize CLK_MSR_ID to reduce memory usage
soc: amlogic: clk-measure: Add support for more SoCs
soc: amlogic: clk-measure: Align compatible entries with DT bindings
soc: amlogic: clk-measure: Support more measurement channels
dt-bindings: soc: amlogic: Add clk-measure compatible to support more SoCs
dt-bindings: soc: amlogic: Reordering compatible of clk-measure
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/drivers
TI SoC driver updates for v7.4
Small cleanup-only pull request for drivers/firmware and drivers/soc/ti.
It contains no functional changes to SoC behavior and no new features
Firmware:
- ti_sci: Simplify the buffer pointer allocation by using kzalloc() in place
of kcalloc()
- ti_sci: Fix a typo in comments
SoC drivers:
- k3-ringacc: Correct the ring API kernel-doc and the DMA ring initialization
kernel-doc so the documentation matches the code
- knav_qmss: Fix typos in comments
* tag 'ti-driver-soc-for-v7.4' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux:
soc: ti: k3-ringacc: Fix DMA ring initialization kernel-doc
soc: ti: k3-ringacc: Correct ring API kernel-doc
firmware: ti_sci: replace kcalloc with kzalloc for buffer pointer allocation
soc: ti: knav_qmss: Fix typos in comments
firmware: ti_sci: Fix typo "upto" in comments
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/drivers
Samsung SoC drivers for v7.4
1. First driver patches for Exynos5515.
2. Fix error paths and possible probe-ordering issue of Exynos PMU
(Power Management) driver.
* tag 'samsung-drivers-7.4' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
soc: samsung: exynos-pmu: order pmu_base_addr before the pmu_context gate
soc: samsung: exynos-pmu: fix error paths in cpuhotplug/idle states setup
dt-bindings: sram: Document samsung,exynos850-acpm-sram
soc: samsung: exynos-chipid: Add Exynos5515 SoC support
dt-bindings: hwinfo: samsung,exynos-chipid: Add Exynos5515 compatible
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
https://git.kernel.org/pub/scm/linux/kernel/git/sven/linux into soc/drivers
Apple SoC driver updates for 7.4
- Enabled shared GPIO support for ARCH_APPLE which will be used for a
shared GPIO line for the speaker codecs
- Add RTKit crashlog support for older 32-bit co-coprocessors used in
older iPhones and iPads.
Signed-off-by: Sven Peter <sven@kernel.org>
* tag 'apple-soc-drivers-7.4' of https://git.kernel.org/pub/scm/linux/kernel/git/sven/linux:
soc: apple: rtkit-crashlog: Add support for AArch32 state 'CrgA' section
soc: apple: rtkit-crashlog: rename 'Crg8' section from regs to aarch64
arm64: Kconfig: Select HAVE_SHARED_GPIOS for Apple Silicon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/drivers
Renesas driver updates for v7.4 (take two)
- Select core functionality that will be required for proper operation
on RZ/G2M v3.0, RZ/G3E, and RZ/V2N.
* tag 'renesas-drivers-for-v7.4-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
soc: renesas: Kconfig: Enable ICU support for RZ/G3E and RZ/V2N
soc: renesas: Enable SYSC driver for r8a774a3
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers
More Qualcomm driver updates for v7.4
Add SM8950 Maili and SM8975 Hawi SoC IDs. Document the Maili CPUCP
mailbox and PMIC arbiter compatibles.
Allow QSEECOM on the Kalambo CRD, Glymur QCB, and Lenovo ThinkPad T14s
Gen 7. Reuse Glymur's UBWC configuration for Kalambo, and add the Nord
LLCC configuration and binding.
Add Shikra SoC and subsystem low-power statistics. Document its
modem_apps GLINK audio channel. Document MSM8952 SCM and record that
MSM8952 has no UBWC. Describe IPQ5424 IMEM as mmio-sram and add the
MSM8960 SPS interrupt-controller syscon compatible.
Fix SCM PAS resource-table retries and handling of empty tables. Use
sleepable one-time initialization for TZMEM, and correct SCM Kconfig
selection for non-Qualcomm builds. Disable the SHM bridge on SM7125
to avoid boot-time RCU stalls.
Fix PMIC GLINK probe ordering and PD charger ULOG removal races. Provide
I2C Hub serial-engine program-RAM depth without accessing absent DMA
registers.
* tag 'qcom-drivers-for-7.4-3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (31 commits)
soc: qcom: geni-se: Drop unused icc_ddr parameter from geni_icc_get()
firmware: qcom: scm: Allow QSEECOM on ThinkPad T14s Gen 7
dt-bindings: mailbox: qcom: Document Maili CPUCP mailbox controller
dt-bindings: spmi: glymur-spmi-pmic-arb: Add compatible for Qualcomm Maili SoC
soc: qcom: pmic_pdcharger_ulog: prevent work requeue during remove
ASoC: dt-bindings: qcom,apr: Add modem_apps GLINK channel for shikra
firmware: qcom: tzmem: disable SHM bridge for SM7125 platform
soc: qcom: ubwc: Add Kalambo UBWC config
firmware: qcom: scm: Allow QSEECOM on Kalambo CRD
firmware: qcom: scm: Allow QSEECOM on the Glymur QCB
soc: qcom: stats: Add stats compatible and config for Shikra
dt-bindings: soc: qcom: stats: Add compatible for Shikra
soc: qcom: fix typo "upto" in comment
firmware: qcom: fix typo "uninterruptable" in comment
soc: qcom: socinfo: Add SM8950 SoC ID
dt-bindings: arm: qcom,ids: Add SoC ID for SM8950
soc: qcom: geni-se: provide PROG_RAM_DEPTH for I2C HUB Serial Engines
dt-bindings: mfd: syscon: add qcom,msm8960-sps-sic
firmware: qcom: scm: Hide QCOM_SCM instead of depending on ARCH_QCOM
soc: qcom: llcc: Add LLCC configuration for Nord
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers
Qualcomm driver updates for v7.4 (second attempt)
Add UBWC 7.0 configuration for Hawi and Maili, and reuse Glymur's UBWC
configuration for Nord.
Parse Glymur's DDR information from SMEM, including its frequency plan and
highest bank bit. Correct DDR frequency overflow and byte order, and handle
unrecognized DDR layouts correctly.
Configure dedicated LLCC slices for the IPQ5424 PPE and Wi-Fi datapaths,
adjust the CPU slice, and propagate errors from optional IRQ lookup.
Allow the GENI serial-engine driver to be selected on 32-bit Qualcomm SoCs
such as Kuno. Fix firmware loading bounds, endianness, and writes to
read-only firmware.
Allow QSEECOM on the Glymur-based HP EliteBook X G2q 14 AI, Lenovo Yoga
Slim 7x Gen11, and Asus Zenbook A14 (UX3407NA), enabling EFI variable
access on the HP and Asus laptops. Release SCM reserved memory on probe
failure or unbind, and limit Qualcomm firmware Kconfig options to Qualcomm
platforms.
Defer PMIC GLINK altmode work until devices resume to avoid accessing
suspended I2C controllers.
Fix cleanup of failed APR service registrations to prevent stale lookups,
and remove unused APR device-ID matching.
Add the SM7250 SoC ID, correct SMSM and SMP2P I/O annotations, and clean
up RPMh kernel-doc and redundant IRQ error messages.
Document the Kuno SCM interface, Shikra CTCU fallback, and Milos CPU
bandwidth monitor. Add Abel Vesa as a Qualcomm SoC reviewer.
* tag 'qcom-drivers-for-7.4-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (34 commits)
firmware: qcom: scm: Allow QSEECOM on Asus Zenbook A14 (UX3407NA)
firmware: qcom: scm: Allow QSEECOM on Yoga Slim 7x Gen11
MAINTAINERS: add Abel as reviewer for linux-arm-msm
soc: qcom: ubwcg: Add Nord UBWC config
firmware: QCOM interfaces should depend on ARCH_QCOM
firmware: qcom: scm: Use devm_of_reserved_mem_device_init()
soc: qcom: smp2p: fix __iomem annotation on entry->value pointer
soc: qcom: apr: clean up failed service registrations
soc: qcom: smem: Fix signedness bug in smem_dram_parse()
soc: qcom: ubwc: Add configuration for Maili
soc: qcom: ubwc: Add configuration for Hawi
soc: qcom: rpmh-rsc: fix kernel-doc issues in rpmh-rsc.c
soc: qcom: rpmh: fix kernel-doc issues in rpmh.c
soc: qcom: rpmh-internal: fix kernel-doc issues in rpmh-internal.h
soc: qcom: pmic_glink: Fix device access from worker during suspend
soc: qcom: llcc-qcom: Handle errors from optional IRQ lookup
soc: qcom: geni-se: Fix write to read-only firmware buffer
soc: qcom: geni-se: Fix fw_end computed before round-up; propagate size to caller
soc: qcom: geni-se: Widen fw_size to u32 to prevent wrap-around
soc: qcom: geni-se: Fix endian conversion for serial_protocol comparison
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/fixes
soc/tegra: Fixes for v7.3
This contains two minor fixes for a missing newline in an error message
and an uninitialized clock rate used during suspend.
* tag 'tegra-for-7.3-soc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: pmc: Fix uninitialised clock rate
soc/tegra: fuse: Add missing newline to APBMISC error message
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
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The DPIO interrupt handler accesses priv->io, but dpaa2_dpio_remove()
releases that object before tearing down the interrupts. The IRQ was
requested with devm_request_irq(), and unregister_dpio_irq_handlers()
only clears its affinity hint. fsl_mc_free_irqs() returns IRQ resources
to the MC resource pool without freeing the handler. An interrupt can
therefore access the freed I/O object before devres releases the IRQ.
Explicitly free the managed IRQ in unregister_dpio_irq_handlers() before
returning its resource to the pool, and perform IRQ teardown before
releasing the I/O object. This also waits for an in-flight handler while
the object is still valid.
This issue was identified during our ongoing static-analysis research
while reviewing kernel code.
Fixes: 993fec7e11ca ("bus: fsl-mc: dpio: add the DPAA2 DPIO object driver")
Cc: stable@vger.kernel.org
Assisted-by: LLM
Co-developed-by: Ijae Kim <ae878000@gmail.com>
Signed-off-by: Ijae Kim <ae878000@gmail.com>
Signed-off-by: Myeonghun Pak <mhun512@gmail.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Link: https://lore.kernel.org/r/20261002194802.375497-3-mhun512@gmail.com
Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
|
|
IRQ registration happens after dpaa2_io_create(), but its failure path
only releases the IRQ resources and the MC portal. The I/O object stays
allocated and published in the service list and per-CPU lookup table,
while devres unmaps its portal registers after probe fails.
Call dpaa2_io_down() on IRQ registration failure to remove the object
from those lookup structures and free it. Reorder the error labels so
that a failed dpaa2_io_create() still skips this cleanup.
Remove unregister_dpio_irq_handlers() from the probe error path, since
no IRQ handler or affinity hint has been installed when registration
fails.
This issue was identified during our ongoing static-analysis research
while reviewing kernel code.
Fixes: fe8fe7723a3a ("soc: fsl: dpio: register dpio irq handlers after dpio create")
Cc: stable@vger.kernel.org
Assisted-by: LLM
Co-developed-by: Ijae Kim <ae878000@gmail.com>
Signed-off-by: Ijae Kim <ae878000@gmail.com>
Signed-off-by: Myeonghun Pak <mhun512@gmail.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Link: https://lore.kernel.org/r/20261002194802.375497-2-mhun512@gmail.com
Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
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The error cleanup loop puts l1rsync_clk and l1rclk_clk a second time
and never puts l1tsync_clk or l1tclk_clk, because the branches that
guard the transmit clocks use the receive clock field names.
Use the matching field in each branch so every clock acquired by
tsa_of_parse_tdms() is released exactly once.
Fixes: 1d4ba0b81c1c ("soc: fsl: cpm1: Add support for TSA")
Cc: stable@vger.kernel.org
Signed-off-by: Wentao Liang <vulab@iscas.ac.cn>
Reviewed-by: Herve Codina <herve.codina@bootlin.com>
Link: https://lore.kernel.org/r/20260917152719.2160395-1-vulab@iscas.ac.cn
[chleroy: Fixed the same in tsa_remove()]
Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
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geni_icc_get() takes an icc_ddr string argument but never uses it: the
DDR interconnect path is looked up with the "qup-memory" string literal
directly, and the sole caller passes that same literal. The parameter
carries no information.
Drop the icc_ddr parameter and update the prototype and call site
accordingly.
Signed-off-by: Somesh Dey <somesh.dey@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://patch.msgid.link/20260930-icc-ddr-param-remove-v1-1-61223714c9bc@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
|
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pmic_pdcharger_ulog_rpmsg_remove() cancels the delayed worker while the
RPMsg endpoint can still deliver callbacks. The RPMsg core invokes the
driver remove callback before destroying the endpoint, so a response
callback can run after cancel_delayed_work_sync() returns and queue the
worker again.
Device cleanup then frees the devm-allocated pmic_pdcharger_ulog while the
requeued delayed work still embeds and dereferences that object. KASAN
reports a slab-use-after-free in pmic_pdcharger_ulog_work().
Use disable_delayed_work_sync() to drain the worker and reject queue
attempts that race with removal.
The issue was reproduced in four of four runs with the real target driver,
RPMsg bus removal, endpoint teardown, workqueue code and devres cleanup.
The test provider delivered a valid response in the window between the
driver remove callback and endpoint destruction. With this change, the
same late callback occurred in four of four runs without a KASAN report,
warning, Oops or panic.
The reproducer uses a test RPMsg provider to control the teardown timing.
No unprivileged trigger or physical Qualcomm-device result is claimed.
Fixes: 086fdb48bc65 ("soc: qcom: add ADSP PDCharger ULOG driver")
Assisted-by: Codex:GPT-5
Signed-off-by: Yibo Tan <lhfff@tju.edu.cn>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://patch.msgid.link/20260912161210.1683266-1-lhfff@tju.edu.cn
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
|
|
Qualcomm Kalambo is a derivative of the Mahua SoC and shares the same
Universal Bandwidth Compression (UBWC) configuration. Add the Kalambo
compatible to the UBWC configuration table to enable support.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Gopikrishna Garmidi <gopikrishna.garmidi@oss.qualcomm.com>
Link: https://patch.msgid.link/20260909-b4-kalambo-crd-v7-5-f5685804478a@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
|
|
SoC LPM stats are present in RPM MSGRAM and subsystem LPM stats are
present in SMEM for Shikra.
For earlier targets using RPM processor like msm8974, rpm_master_stat.c was
used for subsystem LPM stats since those stats were populated in RPM
MSGRAM.
Here is a brief summary of previous targets and their stats configuration,
along with the drivers used to display them.
+---------------|----------------------------|---------------------------+
| SoC | subsystem LPM stats | SoC LPM stats |
|---------------|----------------------------|---------------------------|
| msm8974, | RPM processor MSGRAM | RPM processor MSGRAM |
| msm8226 | (rpm_master_stat.c) | (qcom_stats.c) |
|---------------|----------------------------|---------------------------|
| sm6350, | SMEM (DDR) | AOP processor MSGRAM |
| sdm845, etc. | (qcom_stats.c) | (qcom_stats.c) |
|---------------|----------------------------|---------------------------|
| Shikra | SMEM (DDR) | RPM processor MSGRAM |
| | (qcom_stats.c) | (qcom_stats.c) |
+---------------|----------------------------|---------------------------+
qcom_stats.c supports both the configurations for shikra, reading subsystem
LPM stats from SMEM and reading SoC LPM stats from RPM MSGRAM.
A generic "qcom,rpm-stats" compatible only reads SoC LPM stats like vmin
and vlow. Add shikra rpm compatible and config to read subsystem LPM
stats too along with SoC LPM stats.
Below is an example showing LPM stats for "apss" subsystem with this
change:
cat /sys/kernel/debug/qcom_stats/apss
Count: 2192
Last Entered At: 5498618336
Last Exited At: 5498708046
Accumulated Duration: 2046572620.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
Signed-off-by: Sneh Mankad <sneh.mankad@oss.qualcomm.com>
Reviewed-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://patch.msgid.link/20260907-shikra_stats-v4-2-3825351f9740@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
|
|
Correct "upto" to "up to", reported by scripts/checkpatch.pl using the
misspelling list in scripts/spelling.txt. Only touches comments, no code
changes.
Assisted-by: Cursor:claude-opus-5
Signed-off-by: Hemanth Selam <hemanth.selam@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://patch.msgid.link/20260907061742.10954-3-hemanth.selam@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
|
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Add SoC ID for Qualcomm SM8950 which represents the Maili platform.
Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
Link: https://patch.msgid.link/20260922-maili-socinfo-v1-2-a82bd7d4ca77@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
|
|
The I2C Hub serial elements lacks DMA, so the SE_HW_PARAM_2 register which
is in the DMA register space doesn't exist for those instances.
Provide the ram depth in the compatible data to be used instead
of the reading the missing SE_HW_PARAM_2 register.
Fixes: 522bfb4f33c0 ("soc: qcom: geni-se: Use HW PROG_RAM_DEPTH to validate firmware size")
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20260923-topic-sm8x50-i2c-hub-fw-ram-v3-1-44287b4e814b@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
|
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Add the sub-cache table for Nord, derived from the Nord AU (Safe IVI)
SCT table and limited to the POR use cases that have a unique SCID and a
usecase ID in llcc-qcom.h. Nord has the CFG0/CFG1 pairs and the full
ALGO_ALLOC0..3 set, so it uses the v6 register offsets.
num_banks is set explicitly because LLCC_LB_CNT in LLCC_COMMON_STATUS0
is four bits wide and cannot report sixteen banks; a wrong count makes
the driver map a bank aperture in place of the broadcast region and abort
on the first broadcast read. no_edac is set because the bootloader
leaves the LLCC EDAC registers locked, as on Glymur.
Signed-off-by: Anurag Pateriya <anurag.pateriya@oss.qualcomm.com>
Tested-by: Zhangfei Gao <zhangfei.gao@oss.qualcomm.com>
Reviewed-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Reviewed-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://patch.msgid.link/20260910-nord_llcc-v1-2-30fd1cca65fe@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>
|
|
The PMIC GLINK rpmsg device can appear before the platform device has
finished probing. In that case pmic_glink_rpmsg_probe() sees
__pmic_glink as NULL and returns -ENODEV, which is treated as a fatal
probe failure for the rpmsg endpoint.
If this race is hit, pg->ept is never installed and PMIC GLINK clients
never receive the service-up notification. This may leave the system
with no Type-C functionality and without battery/power supply
management.
Return -EPROBE_DEFER when the rpmsg endpoint arrives before the platform
device is ready.
Fixes: 58ef4ece1e41 ("soc: qcom: pmic_glink: Introduce base PMIC GLINK driver")
Assisted-by: Codex:GPT-5.5
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://patch.msgid.link/20260720-topic-pmic_glink_defer-v1-1-94c0f233f2f7@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>
|
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Convert open-coded if/else with set_bit/clear_bit and their
non-atomic __set_bit/__clear_bit variants to the assign_bit/__assign_bit
API.
Done with Coccinelle semantic patch:
// set_bit -> clear_bit => assign_bit
@@
expression cond, bit, addr;
@@
-if (cond)
- set_bit(bit, addr);
-else
- clear_bit(bit, addr);
+assign_bit(bit, addr, cond);
// clear_bit -> set_bit => assign_bit
@@
expression cond, bit, addr;
@@
-if (cond)
- clear_bit(bit, addr);
-else
- set_bit(bit, addr);
+assign_bit(bit, addr, !cond);
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://patch.msgid.link/20260918141833.3023124-1-peng.fan@oss.nxp.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>
|
|
MSM8952 uses Adreno 405 and predates ubwc just like MSM8939.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Signed-off-by: Muzaffer Kadir <muzafferkadir@mainlining.org>
Link: https://patch.msgid.link/20260921-msm8952-initial-support-v3-14-b96fd3fe298b@mainlining.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>
|
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Add SoC ID for Qualcomm SM8975 which represents the Hawi platform.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
Link: https://patch.msgid.link/20260923-hawi-socinfo-v1-2-f0d1aaee9323@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>
|
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Map qcom,nord to glymur_data in qcom_ubwc_configs[], since Nord shares
Glymur's UBWC capabilities.
Signed-off-by: Gourav Kumar <gouravk@qti.qualcomm.com>
Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260903014309.314962-1-shengchao.guo@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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The entry->value is passed to readl() so should be marked __iomem
so remove these sparse warnings by marking it __iomem and do the
relevant casting to ensure no further warnings:
drivers/soc/qcom/smp2p.c:280:64: warning: incorrect type in argument 1 (different address spaces)
drivers/soc/qcom/smp2p.c:280:64: expected void const volatile [noderef] __iomem *addr
drivers/soc/qcom/smp2p.c:280:64: got unsigned int [usertype] *value
drivers/soc/qcom/smp2p.c:318:34: warning: incorrect type in argument 1 (different address spaces)
drivers/soc/qcom/smp2p.c:318:34: expected void const volatile [noderef] __iomem *addr
drivers/soc/qcom/smp2p.c:318:34: got unsigned int [usertype] *value
drivers/soc/qcom/smp2p.c:446:26: warning: incorrect type in argument 1 (different address spaces)
drivers/soc/qcom/smp2p.c:446:26: expected void const volatile [noderef] __iomem *addr
drivers/soc/qcom/smp2p.c:446:26: got unsigned int [usertype] *value
drivers/soc/qcom/smp2p.c:501:33: warning: incorrect type in argument 1 (different address spaces)
drivers/soc/qcom/smp2p.c:501:33: expected void const volatile [noderef] __iomem *addr
drivers/soc/qcom/smp2p.c:501:33: got unsigned int [usertype] *value
drivers/soc/qcom/smp2p.c:504:26: warning: incorrect type in argument 2 (different address spaces)
drivers/soc/qcom/smp2p.c:504:26: expected void volatile [noderef] __iomem *addr
drivers/soc/qcom/smp2p.c:504:26: got unsigned int [usertype] *value
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Link: https://lore.kernel.org/r/20260623085931.589735-1-ben.dooks@codethink.co.uk
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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apr_add_device() publishes a service in svcs_idr before parsing the
optional protection domain and registering the device. If device
registration fails, put_device() frees the apr_device while its service
remains in the IDR. A received packet can then dereference that stale
entry. The property error path also leaves the service and allocation
behind.
Split device_register() into device_initialize() and device_add() so every
pre-registration error can safely drop the device reference. Remove the
service from the IDR on all failures after publication, then drain the RX
workqueue before dropping the device reference. This prevents an in-flight
lookup from outliving the device.
Fixes: 6adba21eb434 ("soc: qcom: Add APR bus driver")
Signed-off-by: Hongyan Xu <getshell@seu.edu.cn>
Link: https://lore.kernel.org/r/20260806060541.820-1-getshell@seu.edu.cn
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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The "ver" variable is type "enum ddr_info_version". Enum types are
dependent on the compiler but in practical terms here, "ver" is
basically an unsigned int. It needs to be signed for the -EINVAL
to be handled correctly.
Fixes: 1d234eeafc56 ("soc: qcom: smem: Expose DDR data from SMEM")
Signed-off-by: Dan Carpenter <error27@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/an1toQ-acGR0kOWj@stanley.mountain
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Describe the Universal Bandwidth Compression (UBWC) configuration
for the Maili platform. Maili reuses the hawi UBWC configuration.
Signed-off-by: Wangao Wang <wangao.wang@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260812-ubwc_for_hawi_maili-v1-2-c29edecb3bd8@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Add UBWC configuration data for the Hawi platform, which uses UBWC 7.0
and enables the required flags and highest bank bit settings.
This allows drivers to query the correct UBWC capabilities on Hawi.
Also add UBWC 7.0 support to the version tag helper so that
qcom_ubwc_version_tag() returns the correct tag for UBWC 7.0.
Signed-off-by: Wangao Wang <wangao.wang@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260812-ubwc_for_hawi_maili-v1-1-c29edecb3bd8@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Two documentation issues in rpmh-rsc.c:
- rpmh_rsc_pd_callback() has a copy-paste title 'Check if any of
the AMCs are busy' which describes rpmh_rsc_ctrlr_is_busy() not
this function. Fix the title to accurately describe what this
callback does: flush sleep/wake TCS data on PM domain power-off.
- rpmh_rsc_cpu_pm_callback() has the same copy-paste title 'Check
if any of the AMCs are busy'. Fix the title to accurately describe
what this callback does: flush sleep/wake TCS data when all CPUs
enter power down.
No functional impact.
Assisted-by: Claude:claude-sonnet-5
Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260802-b4b4-rpmh-kdoc-v1-3-0f5026293d9a@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Six documentation issues in rpmh.c:
- struct batch_cache_req has a typo in its title: 'batch catch'
should be 'batch cache'. Fix it.
- __rpmh_write(), rpmh_write_async(), rpmh_write(), rpmh_write_batch()
and rpmh_invalidate() use 'name: title' format instead of the
'name() - title' format documented in
Documentation/doc-guide/kernel-doc.rst. Fix all of them.
- rpmh_tx_done() has no kernel-doc comment. Add one describing its
purpose as the RSC driver callback for active-only transfer
completion.
- __rpmh_write(), rpmh_write_async(), rpmh_write() and
rpmh_write_batch() are missing Return: tags. Add them.
- struct cache_req uses 'struct name:' format instead of the
'struct name -' format documented in
Documentation/doc-guide/kernel-doc.rst. Fix it.
- rpmh_write_batch() has an inaccurate description: it says requests
are sent 'without caching' and that SLEEP/WAKE_ONLY requests are
sent as fire-and-forget. In reality, SLEEP/WAKE_ONLY requests are
cached in batch_cache and returned immediately; they are only sent
to the controller later by rpmh_flush(). Fix the description.
No functional impact.
Assisted-by: Claude:claude-sonnet-5
Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260802-b4b4-rpmh-kdoc-v1-2-0f5026293d9a@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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kernel-doc emits two warnings for rpmh-internal.h:
Warning: drivers/soc/qcom/rpmh-internal.h:136 struct member 'ver' not described in 'rsc_drv'
Warning: drivers/soc/qcom/rpmh-internal.h:136 struct member 'regs' not described in 'rsc_drv'
Fix them by adding @ver and @regs entries to the struct rsc_drv
documentation.
While at it, add a missing kernel-doc block for struct rsc_ver, and
update the remaining struct kernel-doc comments (struct tcs_group,
struct rpmh_request, struct rpmh_ctrlr, struct rsc_drv) to use the
'struct name -' format documented in
Documentation/doc-guide/kernel-doc.rst.
No functional impact.
Assisted-by: Claude:claude-sonnet-5
Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260802-b4b4-rpmh-kdoc-v1-1-0f5026293d9a@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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For historical reasons, the GLINK smem interrupt is registered with
IRRQF_NO_SUSPEND flag set, which is the underlying problem here, since the
incoming messages can be delivered during late suspend and early
resume.
In this specific case, the pmic_glink_altmode_worker() currently gets
scheduled on the system_wq which can be scheduled to run while devices
are still suspended. This proves to be a problem when a Type-C retimer,
switch or mux that is controlled over a bus like I2C, because the I2C
controller is suspended.
This has been proven to be the case on the X Elite boards where such
retimers (ParadeTech PS8830) are used in order to handle Type-C
orientation and altmode configuration. The following warning is thrown:
[ 35.134876] i2c i2c-4: Transfer while suspended
[ 35.143865] WARNING: CPU: 0 PID: 99 at drivers/i2c/i2c-core.h:56 __i2c_transfer+0xb4/0x57c [i2c_core]
[ 35.352879] Workqueue: events pmic_glink_altmode_worker [pmic_glink_altmode]
[ 35.360179] pstate: 61400005 (nZCv daif +PAN -UAO -TCO +DIT -SSBS BTYPE=--)
[ 35.455242] Call trace:
[ 35.457826] __i2c_transfer+0xb4/0x57c [i2c_core] (P)
[ 35.463086] i2c_transfer+0x98/0xf0 [i2c_core]
[ 35.467713] i2c_transfer_buffer_flags+0x54/0x88 [i2c_core]
[ 35.473502] regmap_i2c_write+0x20/0x48 [regmap_i2c]
[ 35.478659] _regmap_raw_write_impl+0x780/0x944
[ 35.483401] _regmap_bus_raw_write+0x60/0x7c
[ 35.487848] _regmap_write+0x134/0x184
[ 35.491773] regmap_write+0x54/0x78
[ 35.495418] ps883x_set+0x58/0xec [ps883x]
[ 35.499688] ps883x_sw_set+0x60/0x84 [ps883x]
[ 35.504223] typec_switch_set+0x48/0x74 [typec]
[ 35.508952] pmic_glink_altmode_worker+0x44/0x1fc [pmic_glink_altmode]
[ 35.515712] process_scheduled_works+0x1a0/0x2d0
[ 35.520525] worker_thread+0x2a8/0x3c8
[ 35.524449] kthread+0xfc/0x184
[ 35.527749] ret_from_fork+0x10/0x20
The proper solution here should be to not deliver these kind of messages
during system suspend at all, or at least make it configurable per glink
client. But simply dropping the IRQF_NO_SUSPEND flag entirely will break
other clients. The final shape of the rework of the pmic glink driver in
order to fulfill both the filtering of the messages that need to be able
to wake-up the system and the queueing of these messages until the system
has properly resumed is still being discussed and it is planned as a
future effort.
Meanwhile, the stop-gap fix here is to schedule the pmic glink altmode
worker on the system_freezable_wq instead of the system_wq. This will
result in the altmode worker not being scheduled to run until the
devices are resumed first, which will give the controllers like I2C a
chance to resume before the transfer is requested.
Reported-by: Johan Hovold <johan+linaro@kernel.org>
Closes: https://lore.kernel.org/lkml/Z1CCVjEZMQ6hJ-wK@hovoldconsulting.com/
Fixes: 080b4e24852b ("soc: qcom: pmic_glink: Introduce altmode support")
Cc: stable@vger.kernel.org # 6.3
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260819-b4-soc-qcom-pmic-glink-fix-device-access-on-worker-while-suspended-v3-1-169b00e0d9d4@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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platform_get_irq_optional() returns a positive IRQ number on success or
a negative error code on failure. For an optional IRQ, -ENXIO indicates
that no optional IRQ is available. Other errors, such as -EPROBE_DEFER
and -EINVAL, should be propagated so that the caller can handle them
appropriately.
Propagate negative errors other than -ENXIO.
Signed-off-by: bui duc phuc <phucduc.bui@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260819102630.68991-1-phucduc.bui@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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geni_find_protocol_fw() casts fw->data to a non-const struct se_fw_hdr
pointer and writes back the rounded-up fw_size value:
sefw->fw_size_in_items = cpu_to_le16(fw_size);
The firmware subsystem maps the firmware blob read-only. Writing through
the cast pointer causes a level-3 permission fault on AArch64 and
crashes the kernel during driver probe.
The write-back is no longer necessary: geni_find_protocol_fw() now
propagates the rounded size to the caller via fw_size_out. Remove the
write-back and make sefw (and the hdr pointer in the caller)
const-correct.
Fixes: d4bf06592ad6 ("soc: qcom: geni-se: Add support to load QUP SE Firmware via Linux subsystem")
Cc: stable@vger.kernel.org
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260821-fix-write-to-read-only-firmware-buffer-v3-4-43e6a3abd651@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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caller
fw_end was computed from the raw fw_size_in_items, before the odd-word
round-up. A segment with an odd word count could pass the bounds check
at the unrounded value but then be copied one word past the validated
limit. Move fw_end (and the cfg_{idx,val}_end) calculations to after
the round-up so they always reflect the true copy extent.
The caller geni_load_se_fw() re-read hdr->fw_size_in_items for the
memcpy_toio() length, bypassing the validated and rounded value
established by geni_find_protocol_fw(). Add a fw_size_out output
parameter and use it in the caller.
Fixes: d4bf06592ad6 ("soc: qcom: geni-se: Add support to load QUP SE Firmware via Linux subsystem")
Cc: stable@vger.kernel.org
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260821-fix-write-to-read-only-firmware-buffer-v3-3-43e6a3abd651@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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fw_size is read from the 16-bit fw_size_in_items field and incremented
when the count is odd. If fw_size_in_items == 0xffff the increment
wraps to 0 as a u16, making the bounds check below pass for a firmware
segment whose actual size was not validated. Widen fw_size to u32 so
the increment never wraps.
Fixes: d4bf06592ad6 ("soc: qcom: geni-se: Add support to load QUP SE Firmware via Linux subsystem")
Cc: stable@vger.kernel.org
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260821-fix-write-to-read-only-firmware-buffer-v3-2-43e6a3abd651@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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