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path: root/drivers/pinctrl/microchip
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8 daysMerge tag 'pinctrl-v7.4-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "Nothing special really, some new drivers, the usual trickle of fixes. Oddly not even vary many LLM-assisted fixes, I guess they haven't found their way into this subsystem yet. Core changes: - Support input-debounce-ns pin config property. New drivers: - Qualcomm: - Hawi SoC TLMM and LPASS LPI TLMM - Kuno (ARM32!) SoC TLMM - MSM8952 SoC TLMM - PMAU0102 SPMIO GPIO - Starfive JHB100 SoC sys0, sys0h, sys1, sys2, per0, per1, per2 per2pok and per3 (apparently strongly modularized silicon) - Ambarella CV75 - Apple T8140 SoC used in iPhone 16 [Pro] and MacBook Neo - Econet EN7528 - Allwinner Sunxi A733 - Mediatek MT6735 Improvements: - Renesas RZ/3GL: SD channel PoC, I2C power source etc - The SCMI pin controller uses generic helpers for handling groups and functions" * tag 'pinctrl-v7.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (106 commits) pinctrl: stm32: program the EXTI mux from .alloc instead of .activate pinctrl: stm32: Fix the unit of the hwspinlock timeout pinctrl: stm32: Fix fwnode reference leak in stm32_gpiolib_register_bank() dt-bindings: pinctrl: brcm,nsp-gpio: Convert to DT schema pinctrl: mediatek: Add MT6735 pinctrl driver dt-bindings: pinctrl: mediatek,mt6779-pinctrl: Add bindings for MT6735 pin controller dt-bindings: pinctrl: mediatek,mt6779-pinctrl: Document MT6765 pin controller dt-bindings: pinctrl: mediatek,mt6779-pinctrl: Add MT6795 dt-bindings: pinctrl: mediatek,mt6779-pinctrl: Improve pinctrl subnode and property descriptions dt-bindings: pinctrl: mediatek,mt6779-pinctrl: Pull pinctrl node changes from MT6795 document pinctrl: tegra: xusb: free maps on DT map failure pinctrl: sprd: free maps on DT map failure pinctrl: kconfig: Select generic pinctrl helpers for scmi pinctrl pinctrl: scmi: Replace pinctrl ops get group info with generics pinctrl: scmi: Replace pinmux ops get function info with generics pinctrl: ambarella: fix NULL vs IS_ERR() bug in amb_pinctrl_register() pinctrl: starfive: fix missing CONFIG_OF dependencies pinctrl: ambarella: add CONFIG_OF dependency pinctrl: apple: Add t8140-pinctrl support dt-bindings: pinctrl: apple,pinctrl: Add t8140 compatible ...
2026-09-14pinctrl: mpfs-mssio: fix whitespace in debugfs outputConor Dooley
The printout from mpfs_pinctrl_pinconf_dbg_show() is appended to information from the core, so a leading space is required or the world will end. Fixes: 488d704ed7b7 ("pinctrl: add polarfire soc mssio pinctrl driver") Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-09-14pinctrl: mpfs-mssio: use correct regmap function to set bank voltageConor Dooley
regmap_assign_bits() is not the correct function to use for an RMW operation, as it maps to regmap_set_bits() or regmap_clear_bits() and the former will never zero a bit. Use regmap_update_bits() instead, which will actually set the bank voltages to what have been requested. CC: stable@vger.kernel.org Fixes: 488d704ed7b7 ("pinctrl: add polarfire soc mssio pinctrl driver") Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-09-14pinctrl: mpfs-mssio: fix width of unused bank voltage settingConor Dooley
The bank voltages are only 4 bits wide, so when a pin was unused the driver was not correctly interpreting it as being at zero volts, because the driver's value for unused had two extra set bits. CC: stable@vger.kernel.org Fixes: 488d704ed7b7 ("pinctrl: add polarfire soc mssio pinctrl driver") Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-07-03Replace <linux/mod_devicetable.h> by more specific <linux/device-id/*.h> (c ↵Uwe Kleine-König (The Capable Hub)
files) Replace the #include of <linux/mod_devicetable.h> by the more specific <linux/device-id/*.h> where applicable. For most cases the include can be dropped completely, only a few drivers need one or two headers added. Acked-by: Danilo Krummrich <dakr@kernel.org> Acked-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Link: https://patch.msgid.link/1a3f2007c5c5dcf555c09a4035ce3ae8ef1b6c49.1782808461.git.u.kleine-koenig@baylibre.com Signed-off-by: Uwe Kleine-König (The Capable Hub) <u.kleine-koenig@baylibre.com>
2026-03-03pinctrl: microchip-mssio: Fix missing return in probeFelix Gu
In mpfs_pinctrl_probe(), when pctrl->regmap fails, it just print out an error message without return, which could lead serious errors. Fixes: 488d704ed7b7 ("pinctrl: add polarfire soc mssio pinctrl driver") Signed-off-by: Felix Gu <ustc.gu@gmail.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-02-16Merge tag 'pinctrl-v7.0-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "Core changes: - Drop the unused devm_pinctrl_unregister() function - Move pretended generic pin control functionality out of the core and into the Amlogic AM4 driver. We have something better coming (hopefully) New hardware support: - Spacemit K3 (RISC-V) pin control support - Atmel AT91 PIO4 (ARM32) SAMA7D65 pin control support - Exynos9610 (ARM64) pin control support - Qualcomm Mahua TLMM (ARM64) pin control support - Microchip Polarfire MSSIO (RISC-V) pin control support - Ocelot LAN9645XF (multiplatform) pin control support Improvements: - Using a few more guards for locking - Various nonurgent fixes and tweaks" * tag 'pinctrl-v7.0-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (73 commits) pinctrl: generic: move function to amlogic-am4 driver pinctrl: intel: Align Copyright note with corporate guidelines pinctrl: mediatek: remove unused drv_offset field pinctrl: canaan: k230: Fix NULL pointer dereference when parsing devicetree pinctrl: single: fix refcount leak in pcs_add_gpio_func() pinctrl: meson: amlogic-a4: Fix device node reference leak in bank helpers pinctrl: qcom: sm8250-lpass-lpi: Fix i2s2_data_groups definition pinctrl: core: Remove duplicate error messages pinctrl: core: Simplify devm_pinctrl_*() pinctrl: core: Remove unused devm_pinctrl_unregister() dt-bindings: pinctrl: spacemit: fix drive-strength check warning pinctrl: fix kismet issues with GENERIC_PINCTRL pinctrl: tangier: Join tng_pinctrl_probe() into its wrapper pinctrl: tangier: Remove duplicate error messages pinctrl: lynxpoint: Remove duplicate error messages pinctrl: cherryview: Remove duplicate error messages pinctrl: baytrail: Remove duplicate error messages pinctrl: intel: Remove duplicate error messages pinctrl: equilibrium: Fix device node reference leak in pinbank_init() dt-bindings: pinctrl: pinctrl-microchip-sgpio: add LAN969x ...
2026-01-21pinctrl: add polarfire soc mssio pinctrl driverConor Dooley
On Polarfire SoC, the Bank 2 and Bank 4 IOs connected to the Multiprocessor Subsystem (MSS) are controlled by IOMUX_CRs 1 through 6, which determine what function in routed to them, and MSSIO_BANK#_IO_CFG_CRs, which determine the configuration of each pin. Add a driver for this pin controller, including several custom properties that reflect aspects of the MSS's configuration. Reuse the Kconfig option for iomux0, since controlling MSSIOs without iomux0 routing a function to the MSSIOs in question is pointless, and routing a function to the MSSIOs is equally unhelpful if none of them are configured to make use of that function. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-01-21pinctrl: move microchip riscv pinctrl drivers to a folderConor Dooley
There's three of these drivers now for the same platforms, move them together with other microchip drivers to follow. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Linus Walleij <linusw@kernel.org>