summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/msm
AgeCommit message (Collapse)Author
10 daysMerge tag 'drm-next-2026-10-21' of https://gitlab.freedesktop.org/drm/kernelLinus Torvalds
Pull drm updates from Dave Airlie: "Highlights: - core: a lot of atomic refactoring in progress, panic got split into a core/helpers model - amdgpu: enables HDMI 2.1 FRL and other good things finally, UAlink over Ethernet support - xe: has a bunch of CRI support, ras error for bad vram, memory offlining support. - msm: enables a bunch more GPUs. Otherwise it's a the usual mountain of stuff all over the place. Details: rust: - I/O tree shared with driver-core - DMA tree shared with driver-core - allow aux registration data closures to return covariant sub-fields - Implement Send and Sync for MapleTree - add pci resource flags and IORESOURCE_MEM_64 drm/rust: - add dma_fence abstraction - init DRM registrations and their data in place - drop unused flags argument to registration vgaarb: - rework API to pass a private ptr instead of pci device sound: - adapt to omapdrm changes gem: - add callback for handle count going to 0 gpusvm: - share one HMM fault and keep single mappings inline pagemap: - Prevent CPU stalls during unbounded pagemap teardown dma-fence: - fix docs vga_switcheroo: - disconnect from fbcon - update fbcon from within fbdev emulation atomic: - move DRM from state reset callbacks to atomic_create_state - remove drm_simple_encoder_init panic: - split into core and helpers buddy: - improve dirty tracking clients: - improve vmap handling - fbdev: Move helpers from drm_kms_helper.ko to drm_client_lib.ko display: - export HDMI SCDC status data via debugfs - rework SCDC for better HDMI 2.0 support - dp/mst: improve DPCD compliance edid: - parse AMD VSDB - parse ALLM/VRR capabilities - support detecting panel size log: - add drm_warn_ratelimited sched: - cleanup interface - add missing locking - fix run-queue cleanup - fix locking sysfb: - remove obsolete quirk for Lenovo D330 - fix panel orientation for non-native display modes - drop drm_class_device_register colorop: - provide DRM_COLOR_OP_FIXED_MATRIX bridge: - analogix: Support eDP lane mapping - ti-sn65dsi83: Support LVDS Channel B on SN65DSI84 - Select DRM_PANEL_BRIDGE for various drivers that require it - add chrontel ch7218a support panel: - panel-edp: Support MNE007QS3-F, TM140VDXP15, and KD116N36-30NB-A001 - samsung-s6d16d0: Use mipi_dsi_*_multi() functions - support Ilitek ILI7836A OLED plus DT bindings - support Novatek NT36532 plus DT bindings - convert several drivers to managed cleanup - fix Kconfig selections - edp: - Add support for BOE NV140FHM-T0A - Support CSOT MNE007QB1-1 - NV140WU2-M70 - ebbg-ft8719: Fix MODULE_LICENSE() string; Improve initialization - samsung: Share test-key helpers - ilitek-ili9882t: Support Ilitek IL79600A plus DT bindings - simple: Support Truly TFT320240-229-E plus DT bindings; Support BOE DV215FHM-R01 plus DT bindings - Refactor struct drm_panel to contain struct drm_bridge plus fallout in various panel drivers - Add support for BOE Novatek NT51021, Retroid Pocket 6, Raydium RM69220 DDIC panels, Sharp LQ138P1JX61 eDP, BOE NV140FHD-N43, AUO B140HAN04.0, AUO 0x0db3, panels. amdgpu: - use AMD VSDB for freesync - implement YUV-to-RGB with fixed-matrix colorop - enable FRL for HDMI - HDMI 2.1 freesync support - HDMI 2.1 ALLM support - HDMI 2.1 VRR support - UALoE (UALink over Ethernet) support - add syncobj_points to userq signal ioctl - drop unused kunit tests - NBIO/GC/MMHUB/SMU updates/fixes - GPU spatial partitioning updates - display kunit fixes - userq fixes - RGB quantization fixes - DC RMCM refactor - DP MST fixes - USB4 fixes - add new trace events - Rework display instance handling - stack frame size fixes for various compilers/configs - VCN 4/5 reset fixes - freesync updates - cursor refactor - Fix direct scanout alpha on some DRM_FORMATs - Expand Mac reserved memory workaround - Make runtime pm more fine grained amdkfd: - updates and fixes - GC 10 CU occupancy support radeon: - eDP fix for DCE3.2 iMacs xe: - add drm_ras netlink error event support - add memory page offlining support - introduce error threshold to drm_ras - fix stale GTT mappings on unmap - reject page faults for non-page fault mode scratch VM - enable CRI package and VRAM temperatures - introduce cold reset recovery - handle CRI+ power interval encoding - VF migration for multi-queue - handle exec queue teardown after hot unplug - alerts and controller enabling modifications - use IBCv3 on PTL - VRAM health check - report GT TDR and VM rebind faults using SIGID - add multi_queue_active_lrca debugfs - shrinker: Runtime PM reference for non-system memory - guc: Add simple KLV decoder helpers - debugfs: Expose per-engine idle status - Keep walking on SVM eviction failure - Nuke PTs only after unlinking contested VMAs - limit sg segment size to PAGE_SIZE on Xen PV - keep VF LMEM bar size low if no VFs - CPU binds and ULLS on migration queue - New PTL PCI ID - Enable PXP for NVL-S - Do not dma_fence_put zero fences in err_out path - Refresh TTM LRU on SVM prefetch - export device UID in sysfs i915: - rename GEN6_PCODE_DATA to match spec - fix incorrect RCU teardown order - fix potential UAF in command parsing - avoid WARN splat during RPS boosting race - use simpler min functions - Fixes to make i915 work well with PREEMPT_RT i915/display: - Enable CMRR (Content Match Refresh Rate) in fixed-RR VRR path - Switch DG2 MPLL to DPLL framework - DP-HDMI PCON DSC fixes - limit invalid joiner combinations - CDCLK related fixes and refactor around PCODE integration - Gate UHBR SST SDP splitting on sink caps - add HDMI TMDS audio bandwidth check - vswing/preemph override - enable AS SDP Skip frames - Handle negative configuration index on DP link caps for robustness - Preparation for enabling SDR plane color pipeline - An eDP quirk for HP Pavilion Plus - Introduce PME (Power Management Event) support on display hotplug - Handle VSC SDP revision 7 in unpack msm: - CI: - Dropped sc7180 trogdor lazor from the CI - Core: - Fixed msm_ioremap for resources without a name - Changed msm.separate_gpu_kms to default to auto selection - GPU: - Enable CLX (Current Limit eXtension) for gen8 to avoid exceeding limits on CX/GX rails - New GPUs: a830 (Pakala), a845 (Maili), a850 (Hawi), x2-85 (Mahua) - Fix VBIF halt mask on a306, which was preventing runpm suspend - Enable THP support for GEM buffers - Add modparam to disable waiting on fences in shrinker - Drop use of drm_prime_sg_to_page_array() - a5xx: don't read the GPMU registers on GPUs without a GPMU - a2xx/a3xx/a5xx: hangcheck progress detection - a6xx: gmuwrapper runpm fix - Calculate reported GMEM size based on active slices - Split a6xx/a7xx/a8xx catalog - DP: - Picked up some preparation patches for the MST support - Fixed reported status of the link training - DPU: - Fixed CRTC bandwidth computation - Fixed DSC programming - Fixed encoder disablement path - DSI: - Fixed VM leak in error path - Indention fix - MDP5: - Added MSM8952 configuration - Dropped incorrect cursor pipe on MSM8976/56 - HDMI: - Small fixes nouveau: - improve runtime PM on R570 GSP firmware - various fixes throughout the driver - dispnv50: support 2.147 GHz pixel clock in GB20x nova: - add initial uapi concept - add initial PRAMIN access support - add GpuMm centralized memory manager - add GPU VM and BAR1 support - add GPU interrupts and GSP events support - GSP messaging fixes tyr: - use bitfield! - zero unsupported and newly added GPU info fields - limit doorbell array to 17 entries exynos: - FIMD fixes - Fix clock leak on resume error path - Fix Sparse warnings by adding missing __iomem annotation - VIDI cleanup - Replace kmalloc() and copy_from_user() with memdup_user() amdxdna: - fix BO handling - Support AIE2 rev 9 - Fix UAF access in scheduler fences - Update workqueue interface - expose busy time via fdinfo ast: - support 256-byte EDID hyperv_drm: - remove support for pre win10 hosts komeda: - fix GLB_CORE_ID usage omap: - report HDMI hotplug events to ASoC HDMI codec panthor: - provide gpu_cache_flush tracepoint - improve dma_fence signalling latency - improve locking - export scheduling information via debugfs - Validate user-space input against firmware limits qaic: - reject BOs that exceed maximum page count - add missing include statements verisilicon: - fix hardware cursor offsets vkms: - implement YUV-to-RGB with fixed-matrix colorop gma500: - avoid unsupported ARGB formats in primary plane hibmc: - handle vblank interrupts correctly ivpu: - add DRM_IVPU_CAP_CMDQ_SET_PRIORITY - support command-queue priority ioctl - Simplify NULL-pointer handling in cleanup code arcpgu: - replace simple-display pipeline with regular atomic helpers aspeed: - replace simple-display pipeline with regular atomic helpers gm12u320: - replace simple-display pipeline with regular atomic helpers imagination: - various improvement to firmware interaction - add job to pvr_job_submit_fw trace event mali-dp: - fix runtime PM leak mcde: - replace simple-display pipeline with regular atomic helpers p111: - replace simple-display pipeline with regular atomic helpers - drop unsupported alpha formats from primary plane rcar-du: - support Renesas R-Car V4H DSC - dsi: Support larger transfers with AXI memory - Support RZ/G3L SoC repaper: - replace simple-display pipeline with regular atomic helpers rockchip: - dsi: improve PHY timings ssd130x: - support Solomon SSD1351 OLED plus DT bindings - ssd133x: upgrade color format to RGB565 - ssd132x: Set correct hardware window when clearing screen tve200: - replace simple-display pipeline with regular atomic helpers xen: - replace simple-display pipeline with regular atomic helpers v3d: - improve job handling under perfmon vc4: - reliably reset V3D - drop brcm,vc4-v3d compatible virtio: - fix damage handling - Support ARGB8888 for virtio primary planes. host1x: - Support partitioning imx: - Replace simple-display with regular atomic helpers mxsfb: - Support bus formats plus DT bindings tegra: - improve syncobj handling on submit panfrost: - add Mali-G68 support - improve GPU reset handling rockchip: - add HDMI 2.0 support to dw-hdmi-qp - improve HPD handling" * tag 'drm-next-2026-10-21' of https://gitlab.freedesktop.org/drm/kernel: (2324 commits) drm/adp: Switch to drm_atomic_helper_connector_create_state drm/malidp: Convert to atomic_create_state drm/vc4: Switch to drm_atomic_helper_connector_create_state drm/sysfb: Switch to drm_atomic_helper_connector_create_state drm/solomon: ssd130x: Switch to drm_atomic_helper_connector_create_state drm/imx: ipuv3: Switch to drm_atomic_helper_connector_create_state drm/hyperv: Switch to drm_atomic_helper_connector_create_state drm/bridge: megachips: Switch to drm_atomic_helper_connector_create_state drm/bridge: lontium-lt8912b: Switch to drm_atomic_helper_connector_create_state drm/arm: komeda: Switch to drm_atomic_helper_connector_create_state drm/appletbdrm: Fix incorrect error message on encoder attach failure drm/sun4i: hdmi: Convert to drmm_connector_hdmi_init() drm/rockchip: rk3066_hdmi: Advertise HDMI 1.4 capabilities drm/bridge: lontium-lt9611: Advertise HDMI 1.4 capabilities drm/bridge: ite-it66121: Advertise HDMI 1.2 capabilities drm/bridge: ite-it6263: Advertise HDMI 1.3 capabilities drm/bridge: ite-it6263: Drop redundant .mode_valid hook drm/bridge: inno-hdmi: Advertise HDMI 1.2 capabilities drm/bridge: adv7511: Advertise HDMI 1.2 capabilities drm/sched: Document entity->stopped is protected by entity->lock ...
2026-10-19Merge tag 'vfs-7.4-rc1.file' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/vfs/vfs Pull file table updates from Christian Brauner: "This annotates struct fdtable's fd array with __counted_by_ptr so KASAN and the fortified functions can bounds check it against max_fds and adds a KUnit suite for fdtable. A follow-up uses __struct_size() in the test since sparse doesn't know __builtin_dynamic_object_size(). FD_PREPARE() is simplified. It was built as an ACQUIRE-style guard on infrastructure that was never needed. The ACQUIRE machinery and CLASS_INIT() go away, the variable is declared with __cleanup() directly, struct fd_prepare loses its err field since the fd either holds the descriptor or the error, and callers get a const pointer to the guard behind a UNIQUE_ID() name so they can't shadow it. Code generation is identical" * tag 'vfs-7.4-rc1.file' of git://git.kernel.org/pub/scm/linux/kernel/git/vfs/vfs: file: make struct fd_prepare const and kill its err field cleanup: remove CLASS_INIT() file: declare the FD_PREPARE() variable with __cleanup() directly file: simplify FD_PREPARE() vfs: use __struct_size() in the fdtable KUnit test vfs: Add KUnit tests for fdtable vfs: Annotate struct fdtable's fd field with __counted_by_ptr
2026-10-12Merge tag 'drm-msm-next-2026-10-11' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/msm into drm-next Changes for v7.4 CI: - Dropped sc7180 trogdor lazor from the CI Core: - Fixed msm_ioremap for resources without a name - Changed msm.separate_gpu_kms to default to auto selection GPU: - Enable CLX (Current Limit eXtension) for gen8 to avoid exceeding limits on CX/GX rails - New GPUs: a830 (Pakala), a845 (Maili), a850 (Hawi), x2-85 (Mahua) - Fix VBIF halt mask on a306, which was preventing runpm suspend - Enable THP support for GEM buffers - Add modparam to disable waiting on fences in shrinker - Drop use of drm_prime_sg_to_page_array() - a5xx: don't read the GPMU registers on GPUs without a GPMU - a2xx/a3xx/a5xx: hangcheck progress detection - a6xx: gmuwrapper runpm fix - Calculate reported GMEM size based on active slices - Split a6xx/a7xx/a8xx catalog DP: - Picked up some preparation patches for the MST support - Fixed reported status of the link training DPU: - Fixed CRTC bandwidth computation - Fixed DSC programming - Fixed encoder disablement path DSI: - Fixed VM leak in error path - Indention fix MDP5: - Added MSM8952 configuration - Dropped incorrect cursor pipe on MSM8976/56 HDMI: - Small fixes Notes: - Merged qcom-drivers-for-7.4 to pick up UBWC_7_0 support (needed for Hawi/Maili) which in turn depended on qcom-arm64-for-7.4 Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rob Clark <rob.clark@oss.qualcomm.com> Link: https://patch.msgid.link/CACSVV02V-FOzGj71G0ZL7khkYEKWFW4q4biOZR8B8vyWy20PdQ@mail.gmail.com
2026-10-10drm/msm/a6xx: Split out a7xx/a8xx device tablesRob Clark
This way we can start including generated tables for a8xx GPU snapshot in the device table (without having conflicts with earlier gens if we eventually try to retrofit this approach, or later gens in the future). Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/759096/ Message-ID: <20261010154125.726149-3-robin.clark@oss.qualcomm.com>
2026-10-10drm/msm/a6xx: Move a702/a704 to a6xx listRob Clark
It is a bit more a6xx than a7xx, and this simplifies the next patch. Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/759094/ Message-ID: <20261010154125.726149-2-robin.clark@oss.qualcomm.com>
2026-10-10drm/msm/a8xx: report the GMEM size of the active slicesRahul Pon
A8xx GPUs split GMEM evenly between their slices, and parts can have slices fused off: a8xx_gpu_get_slice_info() reads the active slice mask and folds the slice count into the chip ID. The GMEM size reported to userspace (MSM_PARAM_GMEM_SIZE) is still the catalog value for all slices, so on a part with fused-off slices userspace would size its tiles and place its CCU caches past the end of the GMEM that exists. Qualcomm's downstream driver reports GMEM for the active slices: gen8_get_gmem_size() in KGSL divides the GMEM size by the number of physical slices and multiplies it by the number of active ones. Do the same when reading the slice mask. The GMEM protection and UCHE setup still cover the full range, as in KGSL. Fixes: 288a93200892 ("drm/msm/adreno: Introduce A8x GPU Support") Signed-off-by: Rahul Pon <theflyingrahul@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/757560/ Message-ID: <20260930183840.1171-1-theflyingrahul@gmail.com> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
2026-10-05drm/msm/a6xx: check pm_runtime_resume_and_get during resumeRoman Demidov
The return values of pm_runtime_resume_and_get() calls in a6xx_pm_resume() are not checked, which can lead to hardware access on suspended devices and PM reference underflows. Fix this by checking the return value of each pm_runtime_resume_and_get() call and properly unwinding the previously acquired resources on failure. Found by Linux Verification Center (linuxtesting.org) with SVACE. Fixes: 5a903a44a984 ("drm/msm/a6xx: Introduce GMU wrapper support") Signed-off-by: Roman Demidov <roman.demidov.nn@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/757106/ Message-ID: <20260929142103.81854-2-roman.demidov.nn@gmail.com> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
2026-10-05drm/msm/a6xx: fix use-after-free of OPP in a6xx_pm_resumeRoman Demidov
The OPP reference obtained via dev_pm_opp_find_freq_ceil() is dropped with dev_pm_opp_put() before being passed to dev_pm_opp_set_opp(). If the reference count reaches zero, the OPP object may be freed, leading to a use-after-free when dev_pm_opp_set_opp() dereferences it. Fix the order of calls: first use the OPP to set the required performance state, then release the reference. Fixes: 5a903a44a984 ("drm/msm/a6xx: Introduce GMU wrapper support") Signed-off-by: Roman Demidov <roman.demidov.nn@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/757104/ Message-ID: <20260929142103.81854-1-roman.demidov.nn@gmail.com> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
2026-10-05drm/msm/a5xx: Add hangcheck progress detectionDmitry Baryshkov
A5xx has no progress callback, so any submit still running when the hangcheck timer expires is declared hung, and long compute dispatches such as KHR-GLES31.core.compute_shader.simple-compute-shared_context are reset on A530 while still making progress. Comparing the CP IB1/IB2 state, as a3xx and a6xx do, is not enough: during a long dispatch the CP has fetched the whole IB and waits in one packet. Also count ALU working cycles on SP performance counter 0, which Mesa leaves to the kernel (and the kernel hasn't been using up to now). Assisted-by: LLM Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/757302/ Message-ID: <20260930-adreno-progress-v2-3-3882f0fcd7b4@oss.qualcomm.com> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
2026-10-05drm/msm/a3xx: Add hangcheck progress detectionDmitry Baryshkov
A3xx has no progress callback, so the hangcheck declares a lockup as soon as a submit is still running when the timer expires, no matter whether the CP is advancing. On A306 a piglit tex-miplevel-selection run is a single submit of about 58k draws that takes 1.2-1.3 s to complete, and it gets reset partway through on every run. With the hangcheck period raised to 10 s the same runs pass without a hang. Compare the CP IB1/IB2 base and remaining size between timer expirations, like a6xx does. On A306 these move on every 20 ms sample while such a submit executes and read zero when idle. The prefetch queues are small (32 and 64 for IB1 and IB2), so buffered data does not hide progress for long. Assisted-by: LLM Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/757301/ Message-ID: <20260930-adreno-progress-v2-2-3882f0fcd7b4@oss.qualcomm.com> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
2026-10-05drm/msm/a2xx: Add hangcheck progress detectionDmitry Baryshkov
A2xx has no progress callback, so any submit still running when the hangcheck timer expires is declared hung, no matter whether the CP is advancing. A false lockup is particularly expensive here: a2xx recovery is unreliable, and a second reset shortly after the first one leaves a2xx_hw_init() failing for good, so everything submitted afterwards fails as well. Compare the CP IB1/IB2 base and remaining size between timer expirations, like a6xx does. Assisted-by: LLM Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/757299/ Message-ID: <20260930-adreno-progress-v2-1-3882f0fcd7b4@oss.qualcomm.com> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
2026-10-05drm/msm/gem: Drop use of drm_prime_sg_to_page_array()Rob Clark
Now that we've removed any use of the page array outside of paths that are restricted to native (non-imported) objs, we can remove use of the deprecated function and allow msm_obj->pages to be NULL for imported dma-bufs. Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Acked-by: Christian König <christian.koenig@amd.com> Patchwork: https://patchwork.freedesktop.org/patch/757711/ Message-ID: <20261002152948.85308-7-robin.clark@oss.qualcomm.com>
2026-10-05drm/msm/gem: Stop calling get_pages() for imported dma-bufsRob Clark
Use msm_obj->sgt rather than msm_obj->pages to determine that a obj is resident. The sgt is populated up-front for imported dma-bufs, so we will never go down the get_pages() path for imported objects. Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Acked-by: Christian König <christian.koenig@amd.com> Patchwork: https://patchwork.freedesktop.org/patch/757710/ Message-ID: <20261002152948.85308-6-robin.clark@oss.qualcomm.com>
2026-10-05drm/msm/gem: Stop exposing a page arrayRob Clark
The remaining callers of msm_gem_pin_pages_locked() and msm_gem_get_pages_locked() don't actually care about pages, other than as a conduit for returning an error. So convert them to just directly return an int instead. And rename _get_pages_locked() to _make_resident_locked() to better reflect it's purpose. Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Acked-by: Christian König <christian.koenig@amd.com> Patchwork: https://patchwork.freedesktop.org/patch/757708/ Message-ID: <20261002152948.85308-5-robin.clark@oss.qualcomm.com>
2026-10-05drm/msm/gem: Use get_pages() directly in vmap pathRob Clark
Split out a helper to check madv state, and inline what remains of msm_gem_get_pages_locked() in get_vaddr(). The vmap path is already disallowed on imported dma-bufs. And the rest of the callers of msm_gem_get_pages_locked() don't actually care about the pages, they just want to know that the obj is resident. This gets us one step closer to not actually caring about the page array for imported dma-bufs. Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Acked-by: Christian König <christian.koenig@amd.com> Patchwork: https://patchwork.freedesktop.org/patch/757704/ Message-ID: <20261002152948.85308-4-robin.clark@oss.qualcomm.com>
2026-10-05drm/msm/gem: Mmap imported dma-bufs via the exporterRob Clark
This was always the way it was supposed to work, and when we drop the page array for imported dma-bufs our fault handling path will no longer work. Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Reviewed-by: Christian König <christian.koenig@amd.com> Patchwork: https://patchwork.freedesktop.org/patch/757703/ Message-ID: <20261002152948.85308-3-robin.clark@oss.qualcomm.com>
2026-10-05drm/msm/gem: Add helper to check if residentRob Clark
Mostly we don't care about the page array, mapping/etc works in terms of the sgt. Add a helper to prepare for allowing the page array to be NULL for imported dma-bufs. Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Acked-by: Christian König <christian.koenig@amd.com> Patchwork: https://patchwork.freedesktop.org/patch/757702/ Message-ID: <20261002152948.85308-2-robin.clark@oss.qualcomm.com>
2026-10-05drm/msm: Sync registers from mesaRob Clark
Sync changes from mesa commit 81fae85847d2 ("freedreno/registers: Sync xml changes back from kernel"). Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/757953/ Message-ID: <20261003223723.400020-1-robin.clark@oss.qualcomm.com>
2026-10-05drm/msm/a5xx: don't read the GPMU registers on GPUs without a GPMUDmitry Baryshkov
Only a530/a540 have a GPMU. On the other a5xx parts, reading the 0xa800-0xac60 GPMU aperture during a crashdump resets the board -- on sda660 (a512) a GPU hang thus reboots the SoC instead of recovering. Split the GPMU block into its own array and collect it only when a GPMU is present. Fixes: e20c9284c8f2 ("drm/msm/adreno: Add support for Adreno 510 GPU") Assisted-by: LLM Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/754867/ Message-ID: <20260920-a5xx-no-gpmu-v1-1-714200254f76@oss.qualcomm.com> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
2026-10-05drm/msm/dpu: round up the compressed INTF widthJoonhoe Kim
For DSI with DSC, drm_mode_to_intf_timing_params() scales the INTF active width by bpp / (3 * bits_per_component) and rounds down. The DSI host computes the same width with DIV_ROUND_UP, both for the pixel clock (dsi_adjust_pclk_for_compression()) and for the active width it programs (dsi_timing_setup(), from bytes per line). When the division is not exact the INTF line is one pclk shorter than the DSI line, and the DSI FIFO overflows. Example: a bonded DSI video-mode panel, 952 pixels per link, DSC 8 bpp at 10 bpc: 952 * 8 / 30 = 253.87, so the INTF uses 253 and the DSI 254. Round up, as the DSI host does. Qualcomm's downstream SDE driver also rounds this width up, and Pengyu Luo needed the same rounding on the Legion Y700 gen 4 [1]. Tested on a Lenovo Legion Tab Y700 gen 5 (SM8850) with that panel, with a module parameter selecting the rounding: rounding down, DPMS off/on gives no vblank and 14000-17000 DSI FIFO error interrupts per second (dsi_err_worker: status=4); rounding up, the picture comes back and there are no errors. Only tested on this device. Link: https://lore.kernel.org/all/CAH2e8h6oinKxN1ndcvHCSc+=bFLXVVDZVAVF0cQHoiaMvEwhPQ@mail.gmail.com/ [1] Fixes: f9ce482d7dc0 ("drm/msm/dpu: fix video mode DSC for DSI") Assisted-by: LLM Signed-off-by: Joonhoe Kim <26rote@gmail.com> Reviewed-by: Pengyu Luo <mitltlatltl@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/757958/ Link: https://lore.kernel.org/r/20261004102758.84436-1-26rote@gmail.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-03drm/msm/dpu: compute the CRTC bandwidth from the state being checkedJoonhoe Kim
_dpu_core_perf_calc_bw() is called with the new CRTC state but sums plane_fetch_bw over drm_atomic_crtc_for_each_plane(), i.e. the planes of the committed state. When the CRTC is re-enabled (DPMS on, system resume) the committed state has no planes attached, so the check computes bw_ctl = 0 and the display runs without an average bandwidth vote on the MDP path until some later commit changes a plane -- which may not happen for a long time on a static screen such as a lock screen. Seen on a Lenovo TB323FU (SM8850) through the interconnect and DPU tracepoints: after DPMS off/on or s2idle, dpu_perf_crtc_update reported bw_ctl=0 and qnm_mdp was left at avg_bw=0 (peak 800000) instead of the 3728793 kBps voted before, until the next mode change. Iterate the plane states of the CRTC state being checked instead. drm_atomic_crtc_state_for_each_plane_state() falls back to the current plane state for planes that are not part of the commit, so the result is unchanged for commits that do touch the planes. With this, bw_ctl is 3728793600 right after DPMS on and after resume. Only tested on this device. Fixes: c33b7c0389e1 ("drm/msm/dpu: add support for clk and bw scaling for display") Assisted-by: LLM Signed-off-by: Joonhoe Kim <26rote@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/757683/ Link: https://lore.kernel.org/r/20261002130656.50577-1-26rote@gmail.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-03drm/msm/dpu: disable the slave encoder before the masterJoonhoe Kim
dpu_encoder_virt_atomic_disable() disables the physical encoders in phys_encs[] order, i.e. the master first. With a split display (two interfaces on one CTL, e.g. bonded DSI) the master's dpu_encoder_helper_phys_cleanup() then resets the shared CTL while the slave's timing engine is still running, and the source pipe is left stalled half-way through the slave's next frame. A power collapse of the MDSS core GDSC clears the stall, so it normally goes unnoticed. When MDSS stays powered across the disable (a full modeset, or an active DP controller), the next enable scans out nothing: black screen with the backlight on. Disable the slave before the master, as atomic_enable() enables them in that order. The slave's cleanup still resets the CTL while the master is running, but the last reset, from the master's cleanup, now happens with both timing engines stopped. Tested on a Lenovo Legion Tab Y700 gen 5 (SM8850, bonded DSI video-mode panel) with MDSS kept active: echo on > /sys/bus/platform/devices/9800000.display-subsystem/power/control DPMS off/on: black 10/10 before, picture 10/10 after. Full modesets were not retested with this version. Only tested on this device. Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Fixes: 22cb02bc96ff ("drm/msm/disp/dpu: reset the datapath after timing engine disable") Assisted-by: LLM Signed-off-by: Joonhoe Kim <26rote@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/757684/ Link: https://lore.kernel.org/r/20261002130712.50612-1-26rote@gmail.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-03drm/msm/dp: don't report link training success after a reinitOleg Keri
When every training attempt fails, the retry loop in msm_dp_ctrl_on_link() ends on a successful msm_dp_ctrl_reinitialize_mainlink(), leaving rc at 0. The caller then enables the stream on an untrained link and the display stays dark. The retry counter only reaches zero in that case, so treat it as a training failure. Fixes: 8ede2ecc3e5e ("drm/msm/dp: Add DP compliance tests on Snapdragon Chipsets") Signed-off-by: Oleg Keri <okerixx@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/756528/ Link: https://lore.kernel.org/r/20260925125314.16563-1-okerixx@gmail.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-03drm/msm: default separate_gpu_kms to auto selectionMahadevan P
On platforms with multiple display subsystems, such as SA8775P, the GPU binds to the first display subsystem that probes. This implicit binding prevents subsequent display subsystems from probing successfully, breaking multi-display support. Use the tristate separate_gpu_kms module parameter with the default value set to auto (-1). In auto mode, the driver selects the binding behavior based on the number of GPUs and display subsystems. This allows display subsystems to probe independently when required, while preserving the existing single-card behavior on simpler systems. The separate_gpu_kms module parameter has the following semantics: -1 (auto, default): Select the binding mode based on hardware topology. If exactly one GPU and one display subsystem are present, bind them together to form a single DRM device. Otherwise, expose the GPU and display subsystems as separate DRM devices. 0: Always bind the GPU and display together to form a single DRM device. 1: Always expose the GPU and display subsystems as separate DRM devices. Additionally, ensure that display subsystems are always exposed as separate DRM devices when no recognized Adreno GPU is present, regardless of the separate_gpu_kms setting. This ensures correct probing on multi-display platforms without affecting single-display, single-GPU systems. Signed-off-by: Mahadevan P <mahadevan.p@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/756649/ Link: https://lore.kernel.org/r/20260928-separate_gpu_kms-v4-1-3f33175de133@oss.qualcomm.com Acked-by: Rob Clark <robin.clark@oss.qualcomm.com> # on IRC Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/msm/dp: add stream-aware link register accessorsYongxing Mou
DisplayPort MST uses multiple stream-specific register spaces. Streams 0 and 1 share the primary link register block with different register offsets, while streams 2 and 3 use dedicated MST link register blocks. Add stream-aware register access helpers that translate stream-specific register offsets and route accesses to the appropriate register space based on the stream id. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/756910/ Link: https://lore.kernel.org/r/20260929-msm-dp-mst-v7-7-4b81473185e7@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/msm/dp: add MST stream register definitionsYongxing Mou
Add the stream-1 (DP1) and MST-link register definitions together with msm_dp_stream_reg(), a helper that translates stream-0 register offsets into their stream-specific equivalents. Keeping the register definitions and translation helper together ensures that all supported mappings are defined in one place. Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/756909/ Link: https://lore.kernel.org/r/20260929-msm-dp-mst-v7-6-4b81473185e7@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/msm/dp: add support for programming p1/p2/p3 register blocksAbhinav Kumar
Each MST stream uses its own pixel register block. Extend pixel register access beyond p0 to support up to four streams. Not all controllers provide all four blocks. Check for optional resources before mapping them to avoid misleading probe errors when they are absent, while propagating mapping failures for resources that are present. Track each block's size separately so register snapshots use the size of the corresponding resource. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/756907/ Link: https://lore.kernel.org/r/20260929-msm-dp-mst-v7-5-4b81473185e7@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/msm/dp: introduce stream_id for each DP panelAbhinav Kumar
With MST, each DP controller can handle multiple streams. There shall be one dp_panel for each stream but the dp_display object shall be shared among them. To represent this abstraction, add a stream_id field to struct msm_dp_panel and introduce the msm_dp_stream_id enum. For SST, the field is initialized to DP_STREAM_0. In the MST path, each panel will be assigned an actual stream_id at stream-enable time by the MST layer (added in later patches). Use the stream ID to control the pixel clock of that respective stream by extending the clock handles and state tracking of the DP pixel clock to an array of max supported streams. The maximum streams currently is 4. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/756906/ Link: https://lore.kernel.org/r/20260929-msm-dp-mst-v7-4-4b81473185e7@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/msm/dp: drop redundant config_ctrl_link() from msm_dp_ctrl_on_stream()Yongxing Mou
REG_DP_CONFIGURATION_CTRL contains link-wide state and is already programmed during link training. Calling config_ctrl_link() from msm_dp_ctrl_on_stream() rewrites the same configuration and is unnecessary. Remove the redundant call. Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/756903/ Link: https://lore.kernel.org/r/20260929-msm-dp-mst-v7-3-4b81473185e7@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/msm/dp: Pass panel to msm_dp_ctrl_config_msa()Yongxing Mou
MST requires the stream ID to select the SOFTWARE_MVID/NVID registers, but msm_dp_ctrl_config_msa() currently has no access to it. Pass panel to the function and derive the pixel clock and pixel format from panel->msm_dp_mode, preparing for MST register programming. No functional change. Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/756901/ Link: https://lore.kernel.org/r/20260929-msm-dp-mst-v7-2-4b81473185e7@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/msm/dp: move link-level teardown from display_disable to display_unprepareAbhinav Kumar
msm_dp_display_disable() currently mixes stream-level shutdown (disable VSC SDP, off pixel clk, clear power_on) with link-level teardown (PSM config when sink_count==0, off_link, PHY re-init or host PHY exit). For DP MST the same link is shared across multiple streams, so disabling one stream must not tear down the link. Move the link-level steps into msm_dp_display_unprepare() so that display_disable() handles only the per-stream sequence, mirroring the split already present on the prepare path (display_prepare_link vs display_set_mode / display_enable). SST behaviour is unchanged: atomic_post_disable() still calls display_disable() followed by display_unprepare() in the same order, and the cached dp->panel used inside unprepare is the same panel that was previously passed in. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/756899/ Link: https://lore.kernel.org/r/20260929-msm-dp-mst-v7-1-4b81473185e7@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/fbdev: Move fbdev helpers into client libraryThomas Zimmermann
DRM's fbdev helpers are for the fbdev-emulation clients. Move them into the client-library module. Fix include statements throughout DRM drivers. While at it, rename the files from drm_fb_helper to drm_fbdev_helper. The old name was too reminiscent of DRM's framebuffer code. The GEM support code for fbdev remains part of DRM's memory managers. v4: - fix the depedendencies from v3 v3: - remove obsolete dependencies from Kconfig v2: - update armada und docs Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://patch.msgid.link/20260928080323.23909-3-tzimmermann@suse.de
2026-10-01drm/msm/dpu: Fix GAMMA LUT for sm8750 related DPUsRob Clark
Add missing GC block. Fixes GAMMA LUT on glymur/knp/etc. Reported-by: Connor Abbott <cwabbott0@gmail.com> Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/757345/ Link: https://lore.kernel.org/r/20260930152645.22194-1-robin.clark@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/msm/dp: Initialize the debugfs connector pointerXilin Wu
The debugfs cleanup removed the connector assignment from the debug context, but the video-pattern test files still dereference that pointer to check connector status. Reading those files can therefore dereference NULL. Store the supplied connector before creating the debugfs files. Fixes: ab8420418c2e ("drm/msm/dp: cleanup debugfs handling") Assisted-by: LLM Signed-off-by: Xilin Wu <sophon@radxa.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/757261/ Link: https://lore.kernel.org/r/20260930-msm-dp-hdr10-v1-11-dbbf8b2b42bc@radxa.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/msm/dp: Serialize HPD state updatesXilin Wu
The plug and detect paths hold plugged_lock while accessing the sink state, but IRQ-HPD processing updates the same state without that lock. Unplug also changes the video-test flag and AUX transfer gate before acquiring the lock. Cover those updates with plugged_lock so that users of the connection lock cannot observe partially updated HPD state. This also lets stream failure cleanup decide whether to preserve AUX while excluding HPD processing. Assisted-by: LLM Signed-off-by: Xilin Wu <sophon@radxa.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/757251/ Link: https://lore.kernel.org/r/20260930-msm-dp-hdr10-v1-4-dbbf8b2b42bc@radxa.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm: msm: mdp5: Add MDP5 configuration for MSM8952Muzaffer Kadir
Add the mdp5_cfg_hw entry for MDP5 version v1.12 found on MSM8952. Signed-off-by: Muzaffer Kadir <muzafferkadir@mainlining.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/755197/ Link: https://lore.kernel.org/r/20260921-msm8952-initial-support-v3-13-b96fd3fe298b@mainlining.org [DB: dropped invalid pipe_cursor, it's a part of LM] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/msm/dsi: Fix VM leak in dsi_tx_buf_alloc_6g()Wentao Liang
dsi_tx_buf_alloc_6g() takes a reference to the kms VM with drm_gpuvm_get() and stores it in msm_host->vm. If msm_gem_kernel_new() fails, the function returns early without dropping that reference. Since msm_host->tx_gem_obj is cleared on the error path, msm_dsi_tx_buf_free() will never see a non-NULL tx_gem_obj and thus never calls drm_gpuvm_put(), leaking the VM reference. Drop the VM reference and clear msm_host->vm on the error path. Fixes: 5e05be782645 ("drm/msm/dsi: free TX buffer in unbind") Cc: stable@vger.kernel.org Signed-off-by: Wentao Liang <vulab@iscas.ac.cn> Reviewed-by: Rob Clark <rob.clark@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/754332/ Link: https://lore.kernel.org/r/20260916175738.2089950-1-vulab@iscas.ac.cn Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/msm/mdp5: drop cursor pipe for msm8x76Dmitry Baryshkov
The MSM8976/56 family of platforms doe't have a separate cursor plane. Instead the cursor is a part of the LM block. Drop the erroneously added pipe configuration, letting LM to provide a legacy cursor instead. Fixes: 1860f2a8b8b1 ("drm/msm/mdp5: Add configuration for msm8x76") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/753150/ Link: https://lore.kernel.org/r/20260914-mdp5-fix-cursor-v1-1-9fba3ace6cb9@oss.qualcomm.com
2026-10-01drm/msm/dsi: Fix indentation of if block in dsi_mgr_bridge_mode_valid()Krzysztof Kozlowski
Correct confusing indentation within else {} block in dsi_mgr_bridge_mode_valid(). Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/752659/ Link: https://lore.kernel.org/r/20260911-drm-msm-hdmi-fixes-before-eliza-v4-6-87bdb9f1987f@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/msm: Properly handle msm_ioremap() without nameKrzysztof Kozlowski
msm_ioremap() accepts being called without name of the region to map and in such case maps by index 0. However error paths still use the name in error message. Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Fixes: c8afe684c95c ("drm/msm: basic KMS driver for snapdragon") Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/752660/ Link: https://lore.kernel.org/r/20260911-drm-msm-hdmi-fixes-before-eliza-v4-5-87bdb9f1987f@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/msm/hdmi_bridge: Drop redundant initialization in msm_hdmi_bridge_init()Krzysztof Kozlowski
Local 'struct drm_bridge *bridge' variable is assigned in ~13th line of the function, before any first use, thus explicit NULL initialization is not necessary. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/752657/ Link: https://lore.kernel.org/r/20260911-drm-msm-hdmi-fixes-before-eliza-v4-4-87bdb9f1987f@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/msm/hdmi_bridge: Correct poweroff/audio cleanup order in post_disableKrzysztof Kozlowski
Turning off the power in msm_hdmi_bridge_atomic_post_disable() should follow reverse order of powering up, not only because it is logical, but also because msm_hdmi_audio_update() accesses registers thus block should still be powered on. Depending on specific timing, existing code could have accesses to MMIO of powered off block. Cc: stable@vger.kernel.org Fixes: c0c0d9eeeb8d ("drm/msm: hdmi audio support") Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/752655/ Link: https://lore.kernel.org/r/20260911-drm-msm-hdmi-fixes-before-eliza-v4-3-87bdb9f1987f@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/msm/hdmi: Handle msm_hdmi_power_on() errors during .atomic_pre_enable()Krzysztof Kozlowski
Properly handle power up failures during .atomic_pre_enable() by aborting the .atomic_pre_enable() to avoid accessing registers why blocks did not bring up. Otherwise this could lead to imprecise aborts when accessing MMIO while entire power domain is off. Cc: <stable@vger.kernel.org> Fixes: ba3d7bf3a7ab ("drm/msm/hdmi: Convert PHY files according to new design") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/752652/ Link: https://lore.kernel.org/r/20260911-drm-msm-hdmi-fixes-before-eliza-v4-2-87bdb9f1987f@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-10-01drm/msm/hdmi_phy: Cleanup after msm_hdmi_phy_resource_enable() failureKrzysztof Kozlowski
If msm_hdmi_phy_resource_enable() fails, e.g. when enabling regulators, it should reverse the state of things already changed. msm_hdmi_phy_resource_enable() is used also in probe path, thus such failure, which could be simple deferred probe, would leave these resources permanently enabled for the rest of the runtime. Cc: <stable@vger.kernel.org> Fixes: 15b4a4523859 ("drm/msm/hdmi: Create a separate HDMI PHY driver") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/752654/ Link: https://lore.kernel.org/r/20260911-drm-msm-hdmi-fixes-before-eliza-v4-1-87bdb9f1987f@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-09-28drm/bridge: panel: move all code to drm_panel.cLuca Ceresoli
Work is in progress for every drm_panel to embed a drm_bridge, replacing the panel_bridge entirely. However most of the panel_bridge code will be reused for the drm_bridge embedded into the drm_panel, so just move the code there. Adapt users of the moved functions to include drm_panel.h when necessary. No functional changes, just moving code around. Suggested-by: Maxime Ripard <mripard@kernel.org> Acked-by: Maxime Ripard <mripard@kernel.org> Link: https://patch.msgid.link/20260916-drm-bridge-every-panel-v3-4-83afb4f1a707@bootlin.com Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
2026-09-27drm/msm/gem: Add modparam to disable shrinker blockingRob Clark
Normally if we are under enough memory pressure, the shrinker will eventually start waiting for BOs to become idle. In some very latency sensitive use-cases this is undesirable. Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/753011/ Message-ID: <20260912145922.24115-2-robin.clark@oss.qualcomm.com>
2026-09-27drm/msm: Enable THP for GEM buffersRob Clark
More than 2x speedup on darktable benchmark which was bottlenecked on page allocation/pinning. Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/753009/ Message-ID: <20260912145922.24115-1-robin.clark@oss.qualcomm.com>
2026-09-27drm/msm/a3xx: fix VBIF halt mask for A306/A306ASam Day
A306 and A306A implement only three VBIF XIN halt request bits. Consequently, waiting for the full 6-bit A3xx mask times out and prevents runtime suspend. This issue was reproduced on a DragonBoard 410c: the request reads back as 0x7 and the acknowledgment as 0x00070007 - the poll eventually returns -ETIMEDOUT, and a3xx_pm_suspend fails with -EBUSY. The downstream kgsl driver corroborates this (see link). Since the single-character difference between A3XX_VBIF_XIN_HALT_CTRL0_MASK and A30X_VBIF_XIN_HALT_CTRL0_MASK could be confusing to read, the narrowed GENMASK is instead defined inline in a3xx_vbif_halt(). Fixes: be0e82b8e0c9 ("drm/msm/a3xx: Drain VBIF before GPU suspend") Link: https://android.googlesource.com/kernel/msm/+/c90c7feeca2f5839ad6824f816c0bd207602a2f4/drivers/gpu/msm/adreno_a3xx.c#637 Assisted-by: LLM Signed-off-by: Sam Day <me@samcday.com> Patchwork: https://patchwork.freedesktop.org/patch/756513/ Message-ID: <20260926-a306-vbif-mask-v1-1-2bae5e81c05a@samcday.com> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
2026-09-27drm/msm: Fix vm_bo use-after-free in with_vm_locks()Wentao Liang
The unwind loop drops the vm_bo reference taken while locking before advancing to the next entry. drm_gpuvm_bo_put() may drop the last reference, removing and freeing the vm_bo, after which the plain list iterator dereferences freed memory to advance. Use the safe iterator, which saves the next entry before the body runs. Fixes: fe4952b5f27cca5d ("drm/msm: Convert vm locking") Cc: stable@vger.kernel.org Signed-off-by: Wentao Liang <vulab@iscas.ac.cn> Patchwork: https://patchwork.freedesktop.org/patch/754331/ Message-ID: <20260916175548.2089821-1-vulab@iscas.ac.cn> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
2026-09-27drm/msm/a8xx: Add Adreno 845 supportBhaskar Reddy Valluru
Adreno 845 GPU is present in the Maili SoC. It is very similar to Hawi GPU (A850), except that it doesn't have a MALU unit. Add the necessary register lists and a catalog entry to support this GPU. Signed-off-by: Bhaskar Reddy Valluru <bvalluru@qti.qualcomm.com> Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/755606/ Message-ID: <20260923-hawi-gpu-v1-9-0c3c79a1a470@oss.qualcomm.com> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>